Motorola PowerQUICC II MPC8280 Series Reference Manual page 1346

HDLC Receive Buffer Descriptor (RxBD)
E
Status 0
Length
Pointer
E
Status 0
Length
Pointer
E
Status 0
Length
Pointer
E
Status 1
Length
Pointer
Stored in Rx Buffer
F A A C
Two Frames
Received in HDLC
Time
Legend:
F = Flag
A = Address Byte
C = Control Byte
I = Information Byte
CR = CRC Byte
Figure 37-4. FCC HDLC Receiving Using RxBDs
37-10
Freescale Semiconductor, Inc.
RxBD 0
L F
0 1
0x0020
32-Bit Buffer Pointer
RxBD 1
L F
1 0
0x0023
32-Bit Buffer Pointer
RxBD 2
L F AB
1 1 1
0x0003
32-Bit Buffer Pointer
RxBD 3
XXXX
32-Bit Buffer Pointer
. . .
I I I CR CR F
MPC8280 PowerQUICC II Family Reference Manual
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MRBLR = 32 Bytes for this FCC
Address 1
Address 2
Buffer Full
Control Byte
Information
(I-Field) Bytes
Last I-Field Byte
CRC Byte 1
Buffer Closed
CRC Byte 2
When Closing Flag
Received
Empty
Address 1
Address 2
Abort was
Control Byte
Received after
Control Byte
Empty
Empty
Buffer
Still Empty
Stored in Rx Buffer
Line Idle F A
Buffer
32 Bytes
29
Buffer
32 Bytes
Buffer
32 Bytes
Buffer
32 Bytes
A C Abort/Idle
Unexpected Abort Present
Occurs before Time
Closing Flag
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