Motorola PowerQUICC II MPC8280 Series Reference Manual page 1079

Table 31-27. ABR-Specific TCTE Field Descriptions (continued)
Offset Bits Name
0x1C — ER Explicit rate. Holds the explicit rate value (in cells/sec) of the current ABR channel. ER is
copied to the F-RM cell ER field. The user usually initializes this field to PCR. ER uses the
ATMF TM 4.0 floating-point format.
0x1E — ER-BRM Explicit rate-backward RM cell. Holds the maximum explicit rate value (in cells/sec) allowed
for B-RM cells. The ER-TA field which is inserted to each B-RM cell is limited by this value.
ER-BRM uses the ATMF TM 4.0 floating-point format.
31.10.3 OAM Performance Monitoring Tables
The OAM performance monitoring tables include performance monitoring block test
parameters, as shown in Figure 31-37. Each block test needs a 32-byte performance
monitoring table in the dual-port RAM. In the connection's RCT and TCT, the user
allocates an OAM performance table to a VCC or VPC. See Section 31.6.6, "Performance
Monitoring." PMT_BASE in the parameter RAM points to the base address of the tables.
The starting address of each PM table is given by PMT_BASE + RCT/TCT[PMT] × 32.
0 1
Offset + 0x00 FMCE TSTE
Offset + 0x02
Offset + 0x04
Offset + 0x06
Offset + 0x08
Offset + 0x0A
Offset + 0x0C
Offset + 0x0E
Offset + 0x10
Offset + 0x12
Offset + 0x14
Offset + 0x16
Offset + 0x18
Offset + 0x1A
Offset + 0x1C
Offset + 0x1E
Figure 31-37. OAM Performance Monitoring Table
MOTOROLA Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
2 4 5
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PM CELL HEADER (VPI,VCI,PTI,CLP)
For More Information On This Product,
Go to: www.freescale.com
Description
7 8
BLCKSIZE
TX Cell Count (TCC)
TUC1
TUC0
BEDC0+1-Tx
BEDC0+1-RX
TRCC1
TRCC0
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ATM Memory Structure
15
SN-FMC
31-65