Motorola PowerQUICC II MPC8280 Series Reference Manual page 832

Connecting the MPC8280 to Ethernet
— Deferred frame indication
— Late collision
• Receiver network management and diagnostics
— CRC error indication
— Nonoctet alignment error
— Frame too short
— Frame too long
— Overrun
— Busy (out of buffers)
• Error counters
— Discarded frames (out of buffers or overrun occurred)
— CRC errors
— Alignment errors
• Internal and external loopback mode
25.3 Connecting the MPC8280 to Ethernet
The basic interface to the external SIA chip consists of the following Ethernet signals:
• Receive clock (RCLK)—a CLKx signal routed through the bank of clocks on the
MPC8280.
• Transmit clock (TCLK)—a CLKx signal routed through the bank of clocks on the
MPC8280. Note that RCLK and TCLK should not be connected to the same CLKx
since the SIA provides separate transmit and receive clock signals.
• Transmit data (TXD)—the MPC8280 TXD signal.
• Receive data (RXD)—the MPC8280 RXD signal.
The following signals take on different functionality when the SCC is in Ethernet mode:
• Transmit enable (TENA)—RTS becomes TENA. The polarity of TENA is active
high, whereas the polarity of RTS is active low.
• Receive enable (RENA)—CD becomes RENA.
• Collision (CLSN)—CTS becomes CLSN. The carrier sense signal is referenced in
Ethernet descriptions because it indicates when the LAN is in use. Carrier sense is
defined as the logical OR of RENA and CLSN.
25-4
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MPC8280 PowerQUICC II Family Reference Manual
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