Motorola PowerQUICC II MPC8280 Series Reference Manual page 1311

36.3 Connecting the MPC8280 to Fast Ethernet
Figure 36-3 shows the basic components of the media-independent interface (MII) and the
signals required to make the Fast Ethernet connection between the MPC8280 and a PHY.
MPC8280
1
The management signals (MDC and MDIO) can be common to all of the Fast Ethernet connections in
the system, assuming that each PHY has a different management address. Use parallel I/O port pins to
implement MDC and MDIO. (The I
Figure 36-3. Connecting the MPC8280 to Ethernet
Each FCC has 18 signals, defined by the IEEE 802.3u standard, for connecting to an
Ethernet PHY. The two management signals (MDC and MDIO) required by the MII should
be implemented separately using the parallel I/O.
The MPC8280 has additional signals for interfacing with an optional external
content-addressable memory (CAM), which are described in Section 36.7, "CAM
Interface."
The MPC8280 uses the SDMA channels to store every byte received after the start frame
delimiter into system memory. On transmit, the user provides the destination address,
source address, type/length field, and transmit data. To meet minimum frame requirements,
MPC8280 automatically pads frames with fewer than 64 bytes in the data field. The
MPC8280 also appends the FCS to the frame.
MOTOROLA
Freescale Semiconductor, Inc.
Media-Independent Interface (MII)
Transmit Error (TX_ER)
Transmit Nibble Data 0–3 (TXD[0–3])
Transmit Enable (TX_EN)
Transmit Clock (TX_CLK)
Collision Detect (COL)
Receive Nibble Data (RXD[0–3])
Receive Error (RX_ER)
Receive Clock (RX_CLK)
Receive Data Valid (RX_DV)
Carrier Sense Output (CRS)
Management Data Clock1 (MDC)
Management Data I/O1 (MDIO)
2
C controller cannot be used for this function.)
Chapter 36. Fast Ethernet Controller
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Connecting the MPC8280 to Fast Ethernet
Fast Ethernet
PHY
Medium
36-5