Motorola PowerQUICC II MPC8280 Series Reference Manual page 1231

34.3.3.2.1 On-Demand Cell Processing
In this mode, the cell processing activation function is null. The cell processing task is
triggered directly by the cell reception task if a cell is written to a delay compensation
buffer.
This mode is strictly demand-driven; there is no attempt to reconstruct an IMA Data Cell
Rate (IDCR) from the IMA group at which to process incoming cells. Per the IMA
specification, this is allowable under the following conditions:
• The IMA receiver is directly built into end equipment that directly terminates the
ATM layer (i.e. terminates all ATM connections), and
• The system is only capable of carrying services that either do not require CDV
control (e.g. some data services), or where the CDV is handled in some other way
(e.g. absorbed in a play-out buffer at the ATM layer connection termination).
The MPC8280 may qualify as such a system, if the MPC8280 terminates all ATM
connections that it receives. The buffer-descriptors and external memory serve as a play-out
buffer.
Furthermore, a system which does not terminate cells, but instead passes cells port-to-port,
can also use this mode of operation if either of the following conditions are met:
• All cell streams are switched at the VC level only, and the VC's traffic type is one
supported by the MPC8280's APC. In this case, the APC of the MPC8280 can be
programmed to appropriately reshape the VC at the egress port, and therefore no cell
delay variation (CDV) will be introduced.
• Some (or all) cell streams are switched at the VP level, but the switched VPs only
carry traffic for which cell delay variation (CDV) within the bounds of an IMA
round-robin distribution is tolerable. For example, if the IMA group consists of 8
DS1 links, then the maximum CDV introduced by this method would be 8 cell times,
or approximately 2.2ms
If the system meets the above qualifications, then this mode of operation is recommended,
as it is the simplest and will yield overall better system performance (i.e. this mode requires
less CPM processing power).
34.3.3.2.2 IDCR-Regulated Cell Processing
In this mode, cell processing is triggered at the recovered IMA data cell rate (IDCR).
During group startup, the microcode recovers the PHY clock rate of the TRL from the
average period between requests from the TRL PHY. It does this by averaging the
difference of timestamps taken from the IDCR master timer whenever the TRL's PHY is
serviced. As part of the group activation process, software calculates the required IDCR
request rate (scaling this rate by the number of links in the IMA group and by the 2048/2049
scale factor introduced by stuffing on the TRL), programs it in the IMA group's associated
entry in the IDCR timer table, and enables the group's IDCR timer table entry. Whenever
MOTOROLA
Freescale Semiconductor, Inc.
Chapter 34. Inverse Multiplexing for ATM (IMA)
For More Information On This Product,
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IMA Microcode Architecture
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