Motorola PowerQUICC II MPC8280 Series Reference Manual page 1076

ATM Memory Structure
31.10.2.3.7 UBR+ Protocol-Specific TCTE
Figure 31-35 shows the UBR+ protocol-specific TCTE.
0
Offset + 0x00
Offset + 0x02
Offset + 0x04
Offset + 0x06–0x1E
Figure 31-35. UBR+ Protocol-Specific TCTE
Table 31-26 describes UBR+ protocol-specific TCTE fields.
Table 31-26. UBR+ Protocol-Specific TCTE Field Descriptions
Offset Bits Name
0x00 — MCR Minimum cell rate for this channel. MCR is in units of APC time slots.
0x02 0–7 — Reserved, should be cleared.
8–15 MCRF Minimum cell rate fraction. Holds the minimum cell rate fraction of this channel in units of
1/256 slot.
0x04 — MDA Maximum delay allowed. The maximum time-slot service delay allowed for this priority level
before the APC reduces the scheduling rate from PCR to MCR.
0x06– — — Reserved, should be cleared.
0x1E
31.10.2.3.8 ABR Protocol-Specific TCTE
Figure 31-36 shows the ABR protocol-specific TCTE.
31-62
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—
Maximum Delay Allowed (MDA)
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7 8
MCR
MCR Fraction (MCRF)
—
Description
15
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