Motorola PowerQUICC II MPC8280 Series Reference Manual page 1262

IMA Programming Model
34.4.8.2.3 On-the-Fly Changes of FCC Parameters
In general, the FCC parameters should not require changes when the FCC is operating. In
the event that on-the-fly changes of FCC parameters is performed, those changes should be
made one-by-one first in the parameters of the shadow area, followed by the same change
in the FCC parameter area.
34.4.8.3 IDCR_Init Command
The IDCR_Init command is a host command issued to the CPCR (refer to Section 14.4.1,
"CP Command Register (CPCR)"). This command selects and configures the IDMA
request which will be used for the IDMA master clock. Any of the IDMA channels may be
selected for this function.
The format of the command is as follows:
• SBC = [per the selected IDMA channel]
• OPCODE = 0x00
• PAGE = [per the selected IDMA channel]
34.4.8.4 IDCR Root Parameters
The following IDCR parameters are added to the IMA root table only when IDCR is used.
Offset Name
0x60 IDCR_BASE
0x62 IDCRTICK
0x64 IDCREN
0x65 IDCR_LAST
0x66 IDCR_SVC
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Boldfaced entries indicate parameters that must be initialized by the user. All other parameters are
managed by the microcode and should be initialized to zero unless otherwise stated.
34.4.8.5 IDCR Table Entry
A table entry of the format provided below must be provided for any IMA group for which
IDCR recovery is performed. Table entries in the IDCR table are indexed by the group
number of the associated group. The table entry must be initialized before the associated bit
is set in IDCREN.
34-52
Freescale Semiconductor, Inc.
Table 34-25. IDCR IMA Root Parameters
Width
Hword IDCR table base. Offset of the IDCR table in DPRAM. Must be 8-byte
aligned.
Hword IDCR global tick counter. Initialize to zero.
Byte IDCR enable array. Each bit (0-7) enables/disables the IDCR timer for
the associated IMA group. Initialize to zero at FCC initialization.
0 The IDCR for the associated group is disabled.
1 The IDCR for the associated group is enabled.
Byte Group number of last enabled IDCR timer.
Byte IDCR timer currently being serviced. Microcode-managed parameter.
Initialize to zero.
MPC8280 PowerQUICC II Family Reference Manual
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