Motorola PowerQUICC II MPC8280 Series Reference Manual page 1207

Table 33-13. AAL2 Parameter RAM (continued)
Offset Name
0xE4– —
0xFB
0xFC PAD_TMP_BASE
0xFE —
33.6 User-Defined Cells in AAL2
The user-defined cell (UDC) mode for ATM as described in Section 31.7, "User-Defined
Cells (UDC)," also applies to AAL2 operation. However, for AAL2 operation only, the
UDC headers reside in a table in external memory, not in the BDs.
For transmit channels in AAL2 UDC mode, initialize its UDC header entry in the TX UDC
header table before activating the channel. The header can be up to 12 bytes. The
TX_UDC_Base parameter in the parameter RAM (see Table 33-13), points to the
beginning of the TX UDC header table.
The UDC header of a specific AAL2 transmit VC is located at the following address:
TX_UDC_Base + CH# *16 (where CH# is the ATM channel number)
For receive channels in AAL2 UDC mode, the receiver copies the UDC header from the
first cell received by the VC to the RX_UDC header table. The UDC headers of subsequent
cells of that VC are discarded; UDC extended address mode (UEAD) is not affected.
The UDC header of a specific AAL2 receive VC is located at the following address:
RX_UDC_Base + CH#*16 (where CH# is the ATM channel number)
The structure of a UDC header table (receive or transmit) is shown in Figure 33-22.
UDC_Base
MOTOROLA
Freescale Semiconductor, Inc.
Width
— Reserved. Should be cleared during initialization.
Hword PAD template base address. Points to an internal memory area that
contains the zero cell template. Should be 64-byte aligned. User-defined.
— Reserved. Should be cleared during initialization.
0
CH0 UDC header
16
CH1 UDC header
n*16
CHn UDC header
Figure 33-22. UDC Header Table
Chapter 33. ATM AAL2
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User-Defined Cells in AAL2
Description
33-39