Motorola PowerQUICC II MPC8280 Series Reference Manual page 1316

Ethernet Parameter RAM
The bus atomicity mechanism for CAM accesses may not
function correctly when the CPM performs a DMA access to
an external CAM device. This only impacts systems in which
multiple CPMs will access the CAM.
36.8 Ethernet Parameter RAM
For Ethernet mode, the protocol-specific area of the FCC parameter RAM is mapped as in
Table 36-2.
Table 36-2. Ethernet-Specific Parameter RAM
1
Offset Name Width
0x3C STAT_BUF Word Buffer of internal usage
0x40 CAM_PTR Word CAM address. For FCC Fast Ethernet operation the CAM should be located on the
0x44 C_MASK Word Constant MASK for CRC (initialize to 0xDEBB_20E3). For the 32-bit CRC-CCITT.
0x48 C_PRES Word Preset CRC (initialize to 0xFFFF_FFFF). For the 32-bit CRC-CCITT.
2
0x4C CRCEC Word CRC error counter. Counts each received frame with a CRC error. Does not count
2
0x50 ALEC Word Alignment error counter. Counts frames received with dribbling bits. Does not count
2
0x54 DISFC Word Discard frame counter. Incremented for discarded frames because of an out-of-buffers
0x58 RET_LIM Hword Retry limit (typically 15 decimal). Number of retries that should be made to send a
0x5A RET_CNT Hword Retry limit counter. Temporary decrementer used to count retries made.
0x5C P_PER Hword Persistence. Allows the Ethernet controller to be less persistent after a collision.
0x5E BOFF_CNT Hword Backoff counter
0x60 GADDR_H Word Group address filters high and low are used in the hash table function of the group
0x64 GADDR_L Word
36-10
Freescale Semiconductor, Inc.
NOTE
same bus as the data buffers.
frames not addressed to the station, frames received in the out-of-buffers condition,
frames with overrun errors, or frames with alignment errors.
frames not addressed to the station, frames received in the out-of-buffers condition, or
frames with overrun errors.
condition or overrun error. The CRC need not be correct for this counter to be
incremented.
frame. If the frame is not sent after this limit is reached, an interrupt can be generated.
Normally cleared, P_PER can be from 0 to 9 (9 = least persistent). The value is added
to the retry count in the backoff algorithm to reduce the chance of transmission on the
next time-slot. Using a less persistent backoff algorithm increases throughput in a
congested Ethernet LAN by reducing the chance of collisions. FPSMR[SBT] can also
reduce persistence of the Ethernet controller. The Ethernet/802.3 specifications permit
the use of P_PER.
addressing mode. The user may write zeros to these values after reset and before the
Ethernet channel is enabled to disable all group hash address recognition functions.
The
SET GROUP ADDRESS
Section 36.13, "Hash Table Algorithm."
MPC8280 PowerQUICC II Family Reference Manual
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Description
command is used to enable the hash table. See
MOTOROLA