Motorola PowerQUICC II MPC8280 Series Reference Manual page 785

and the context, an S/T interface device waits for 7–10 ones on the echo bit before letting
the LAPD frame begin transmission, after which the S/T interface monitors transmitted
data. As long as the echo bit matches the sent data, transmission continues. If the echo bit
is ever 0 when the transmit bit is 1, a collision occurs between terminals; the station(s) that
sent a zero stops transmitting. The station that sent a 1 continues as normal.
The I.430 and T1.605 standards provide a physical layer protocol that allows multiple
terminals to share one physical connection. These protocols handle collisions efficiently
because one station can always complete its transmission, at which point, it lowers its own
priority to give other devices fair access to the physical connection.
The HDLC bus differs from the I.430 and T1.605 standards as follows:
• The HDLC bus uses a separate input signal rather than the echo bit to monitor data;
the transmitted data is simply connected to the CTS input.
• The HDLC bus is a synchronous, digital open-drain connection for short-distance
configurations, rather than the more complex S/T interface.
• Any HDLC-based frame protocol can be used at layer 2, not just LAPD.
• HDLC bus devices wait 8–10 rather than 7–10 bit times before transmitting. (HDLC
bus has only one class.)
The collision-detection mechanism supports only:
• NRZ-encoded data
• A common synchronous clock for all receivers and transmitters
• Non-inverted data (GSMR[RINV, TINV] = 0)
• Open-drain connection with no external transceivers
Figure 22-10 shows the most common HDLC bus LAN configuration, a multimaster
configuration. A station can transfer data to or from any other LAN station. Transmissions
are half-duplex, which is typical in LANs.
MOTOROLA
Freescale Semiconductor, Inc.
Chapter 22. SCC HDLC Mode
For More Information On This Product,
Go to: www.freescale.com
HDLC Bus Mode with Collision Detection
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