Motorola PowerQUICC II MPC8280 Series Reference Manual page 1223

decouple the transmit rate of the TRL PHY from the transmit rate of the non-TRL PHYs in
the group to allow for clocking differences between the PHYs.
At startup, the non-TRL links will transmit filler cells until their transmit queues have
reached a minimum depth. In order to maintain less than the specified maximum +/-2.5 cell
transmit timing differential (for cells within an IMA frame), the TRL must exhibit the same
behavior. Therefore, a 4-cell transmit buffer is also maintained for the timing reference link.
The timing reference link will only begin to pass ATM layer cells to its PHY after it has 3
cells in its buffer. Prior to this, it will send filler cells. This behavior will only be
experienced at group start-up.
The TRL task will also implement the standard amount of stuffing on the TRL link by
maintaining a counter. When this task has scheduled (2048/ M) ICP cells for the TRL, a
TRL stuff event will be flagged and an indication of an upcoming stuff event will be
signaled in the ICP LSI field. If a TRL stuff event is flagged when the TRL task triggers,
then a stuff cell will be sent to the TRL's transmit queue, but no cells will be sent to the
transmit queues of the non-TRL PHYs. This forces a standard amount of stuffing on the
TRL, thereby reducing the effective data bit rate of the TRL to less than the minimum data
clock rate allowed by the clock rate tolerance of the physical-layer standard. Therefore by
definition, this effective data bit rate is achievable by the non-TRL links; the non-TRL links
can either stuff less (if their data clock rate is slower than the TRL), or stuff more (if their
data clock rate is faster than the TRL).
34.3.2.1.1 TRL Service Latency
The functionality described in this section is available only
with the latest RAM microcode package.
This optional feature allows the user to change the IMA APC behavior upon TRL request.
When enabled the TRL request will pass a programmable number of cells to the Tx queue
of the links in an IMA group. This can be used in order to suppress the TRL from
consuming a large amount of bandwidth before another cell is transmitted. The TRL
request normally places a cell in a queue for N links where the group contains N links; after
this happens then a non_TRL link is free to pass a cell over the UTOPIA interface. The
delay for the TRL can be long and in some cases the TC layer FIFO can underrun. This
feature can be used to ensure that TRL and non-TRL requests are handled in the same
manner - 1 cell in 1 cell out to the transmit queues. The non-TRL requests will also trigger
APC iterations when this feature is enabled. When using this feature, the depth of the TRL
transmit queue must equal the non-TRL queues.
MOTOROLA
Freescale Semiconductor, Inc.
NOTE
Chapter 34. Inverse Multiplexing for ATM (IMA)
For More Information On This Product,
Go to: www.freescale.com
IMA Microcode Architecture
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