Motorola PowerQUICC II MPC8280 Series Reference Manual page 570

Architecture Documentation
Documentation is available in the following document:
• Programming environments manuals—These books provide information about
resources defined by the PowerPC architecture that are common to processors that
implement the PowerPC architecture. There are two versions, one that describes the
functionality of the combined 32- and 64-bit architecture models and one that
describes only the 32-bit model.
— Programming Environments for 32-Bit Implementations of the PowerPC
Architecture, REV 3(Motorola order #: MPCFPE32B/AD)
For a current list of documentation, refer to http://e-www.motorola.com.
Conventions
This document uses the following notational conventions:
Bold
mnemonics
italics
0x0
0b0
rA, rB
rD
REG[FIELD]
x
n
¬
&
|
IV-4
Freescale Semiconductor, Inc.
Bold entries in figures and tables showing registers and parameter
RAM should be initialized by the user.
Instruction mnemonics are shown in lowercase bold.
Italics indicate variable command parameters, for example, bcctrx.
Book titles in text are set in italics.
Prefix to denote hexadecimal number
Prefix to denote binary number
Instruction syntax used to identify a source GPR
Instruction syntax used to identify a destination GPR
Abbreviations or acronyms for registers or buffer descriptors are
shown in uppercase text. Specific bits, fields, or numerical ranges
appear in brackets. For example, MSR[LE] refers to the little-endian
mode enable bit in the machine state register.
In certain contexts, such as in a signal encoding or a bit field,
indicates a don't care.
Indicates an undefined numerical value
NOT logical operator
AND logical operator
OR logical operator
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
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