Motorola PowerQUICC II MPC8280 Series Reference Manual page 954

Channel-Specific Parameters
29.3.3.1.1 Interrupt Circular Table Entry and Interrupt Mask
(INTMSK) —AAL1 CES
Interrupt circular table entries contain information about channel-specific events. The
interrupt mask (INTMSK) provides bits for enabling/disabling the reporting of each
possible event defined in the interrupt circular table entry. Note that two CES-related
interrupts provide slip indications for the MCC transmitter; these interrupts are reflected in
both the interrupt circular table entries and the INTMSK fields. They are described in
Table 29-19.
0
Interrupt Entry —
INTMSK —
To enable an interrupt, set the corresponding bit. If a bit is cleared, no interrupt request is
generated and no new entry is written in the interrupt circular table. The user must initialize
INTMSK prior to operation. Reserved bits are cleared.
29.3.3.2 Channel Mode Register (CHAMR)—AAL1 CES
Figure 29-6 shows the user-initialized channel mode register, CHAMR, for CES operation.
It is the same as the CHAMR in transparent mode with three extra CES fields in bits 13–15.
0 1
Field MODE POL 1
Reset
R/W
Offset
Figure 29-8. Channel Mode Register (CHAMR)—CES Mode
29-16
Freescale Semiconductor, Inc.
3 4 5
SLIPE SLIPS
CES Mask Bits Mask Bits
Figure 29-7. INTMSK Mask Bits
2 3 4 5 6
1 EP RD
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6 7 8 9 10
UN TXB — NID
—
7 8 9 10
SYNC — TS
—
R/W
0x1A
11 12 13 14
IDL MRF RXF BSY RXB
Mask Bits
11 12 13 14
RQN CESM UDC UTM
MOTOROLA
15
15