Motorola PowerQUICC II MPC8280 Series Reference Manual page 865

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Token
OUT
Reception begins when an OUT token is received. The USB controller fetches the next BD associated
with the endpoint; if the BD is empty, the controller starts sending the incoming packet to the buffer. After
the buffer is full, the USB controller clears RxBD[E] and generates an interrupt if RxBD[I] = 1. If the
incoming packet is larger than the buffer, the USB controller fetches the next BD, and, if it is empty,
sends the rest of the packet to its buffer. The entire packet, including the DATA0/DATA1 PID, are written
to the receive buffers. Software must check data packet synchronization by monitoring the
DATA0/DATA1 PID sequence toggle.
If the packet reception has no CRC or bit stuff errors, the USB receiver sends the handshake selected in
the endpoint configuration register USEPn[RHS] (see table below) to the host. If an error occurs, no
handshake packet is returned and error status bits are set in the last RxBD associated with this packet.
IN
To guarantee a transfer, the control software must preload the endpoint FIFO with a data packet before
receiving an IN token. Software should set up the endpoint TxBD table and set USCOM[STR]. The USB
controller fills the transmit FIFO and waits for the IN token. Once the token is received and the FIFO has
been loaded with the last data byte or with at least four bytes, transmission begins. The four-byte
minimum is a threshold to prevent underruns in the FIFO.
If data is not ready in the transmit FIFO or if USEPn[THS] is set to respond with NAK, a NAK handshake
is returned. If USEPn[THS] was set to respond with STALL, a STALL handshake is returned. (See table
below.) When the end of the last buffer is reached (TxBD[L] is set), the CRC is appended. After the frame
is sent, the USB controller waits for a handshake packet. If the host fails to acknowledge the packet, the
timeout status bit TxBD[TO] is set. Software must set the proper DATA0/DATA1 PID in the transmitted
packet.
MOTOROLA
Freescale Semiconductor, Inc.
Table 27-2. USB Tokens
Description
USB Out Token Reception
Data Packet
USEPn[RHS]
xx
00 (Normal)
01 (Ignore)
10 (NAK)
11 (STALL)
USB In Token Reception
USEPn[THS]
FIFO Loaded
00 (Normal)
01 (Ignore)
10 (NAK)
11 (STALL)
Chapter 27. Universal Serial Bus Controller
For More Information On This Product,
Go to: www.freescale.com
USB Function Description
Handshake Sent
Corrupted
to Host
Yes
None (data
discarded)
No
ACK
No
None
No
NAK
No
STALL
Handshake Sent
to Host
No
NAK
(data discarded)
Yes
Data packet is
sent.
None
NAK
(data discarded)
STALL
27-7

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