Motorola PowerQUICC II MPC8280 Series Reference Manual page 1161

0 1
Offset + 0x00 E —
Offset + 0x02
Offset + 0x06
Offset + 0x08
Table 32-11 describes AAL1 CES RxBD fields.
Table 32-11. AAL1 CES RxBD Field Descriptions
Offset Bits Name
0x00 0 E
1 —
2 W
3 I
4-5 —
6 CM
7-8 —
9 EOSF
10-15 —
0x02 — DL
0x04 — RXDBPTR Rx data buffer pointer. Points to the first location of the associated buffer; may reside in
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2 3 4 5 6
W I — — CM
Rx Data Buffer Pointer
Figure 32-28. AAL1 CES RxBD
Empty.
0 The buffer associated with this RxBD is filled with received data or data reception was
aborted due to an error. The core can read or write any fields of this RxBD. The CP
cannot use this BD again while E = 0.
1 The buffer is not full. This RxBD and its associated receive buffer are owned by the CP.
Once E is set, the core should not write any fields of this RxBD.
—
Wrap (final BD in table)
0 This is not the last BD in the RxBD table of the current channel.
1 This is the last BD in the RxBD table of this current channel. After this buffer is used, the
CP receives incoming data into the first BD in the table. The number of RxBDs in this
table is programmable and is determined only by the W bit. The current table overall
space is constrained to 64 Kbytes.
Interrupt
0 No interrupt is generated after this buffer has been used.
1 An Rx buffer event is sent to the interrupt queue after the ATM controller uses this buffer.
FCCE[GINTx] is set when the INT_CNT reaches the global interrupt threshold.
—
• Continuous mode
0 Normal operation.
1 The empty bit (RxBD[E]) is not cleared by the CP after this BD is closed, allowing the
associated buffer to be overwritten automatically when the CP next accesses this BD.
—
End of super frame. CES mode (RCT[CESM=1]) only.
0 No signaling information should be inserted after closing this buffer.
1 When closing this buffer, the ATM receiver unpacks the CAS information from the
incoming AAL1 cells and stores it in the internal CAS block.
Note that this bit should be set by the user at the end of each super-frame in the common
(MCC, ATM) BD table. See Section 32.4.6, "Channel Associated Signaling (CAS)
Support."
—
Data length. The number of octets the CP writes into the buffer once its BD is closed.
either internal or external memory. This pointer must be burst-aligned.
Chapter 32. ATM AAL1 Circuit Emulation Service
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7 8 9 10
— — EOSF
Data Length
Description
ATM Controller Buffers
11 15
—
32-41