Motorola PowerQUICC II MPC8280 Series Reference Manual page 1284

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IMA Software Interface and Requirements
5. Since we have no active groups, configure IMAROOT[IDCR_LAST] to zero. As
additional groups are created/added, this field must also be modified accordingly
with the group number (groups are numbered 0-7).
6. Copy existing ATM parameter RAM contents to shadow RAM parameter space.
For example, if DREQ1 is used then page 8 (parameter RAM offset 0x8700) must
be used as the shadow RAM. If DREQ2 is used, then page 9 must be used, and so
on. Note that the corresponding functionality previously available and mapped to
that page (e.g., MCC1, MCC2, etc.) will no longer be available.
7. The shadow RAM must use a different address for the RCELL_TMP_BASE.
Program a different address (different than existing value being used) in
RCELL_TMP_BASE. See Section 34.4.8.2.2, "Programming the FCC Parameter
Shadow."
8. Program PIO registers: Indicate which pin is being used as the IDCR input (i.e.,
DREQx). The port and pin selection is configurable and is driven by what other
resources are being used on the MPC8280 (e.g., Port C can be used of DREQ1 or
DREQ2).
9. Program to appropriate rate and enable timer if using a BRG (refer to Chapter 17,
"Baud-Rate Generators (BRGs)"): TMRx, TRRx, and TGCRx. Note: This is only
required if the IDCR clock is supplied by the MPC8280. If an external source is
used, this step can be skipped. An external connection (physical) is required
between the output of the BRG (TOUTx) and DREQx (see step 7 above).
10. Enable IDMAx interrupts (refer to Section 19.8.4, "IDMA Event Register (IDSR)
and Mask Register (IDMR)").
11. Clear IDCR table entries (reset to zero).
12. Issue the IDCR Initialization command (see Section 34.4.8.3, "IDCR_Init
Command"). After this point, the IDCR mechanism can be used.
34.5.4.12.2
Activating a Group in IDCR Mode
The following steps are required when activating a group in IDCR mode.
1. Configure the corresponding group to operate in IDCR mode:
IGRCNTL[IDCR] = 1.
2. Indicate which is the last group that has IDCR enabled. Groups are numbered 0-7.
As additional groups are created/added or removed, this field must also be
modified accordingly with the group number of the last group (in the order of 0-7)
that has IDCR enabled. For example, lets say groups 0 and 1 are active and group 2
is being added. Then IMAROOT[IDCR_LAST] = 2.
3. After GDS has been achieved, the software can now read the captured TRLR value
(see IGRTE[TRLR]). At this point, the group's corresponding IDCR Table Entry
can be programmed. IDCRCNT and IDCRREQ are both initialized to the integer
part of: ((TRLR/(num_links x 128)) x (2048/2049)). IDCRCNTF and IDCRREQF
34-74
Freescale Semiconductor, Inc.
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA

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