Motorola PowerQUICC II MPC8280 Series Reference Manual page 1444

example, 38-4
external signals, 38-3
in-line pattern, 38-3
transmit operation, 38-2
FCCE register
ATM, 31-94
Ethernet, 36-23
FCC overview, 30-15
HDLC, 37-14
FCCM register
ATM, 31-94
Ethernet, 36-23
FCC overview, 30-15
HDLC, 37-14
FCCS (FCC status) register, 30-16, 37-16
FCRx (function code registers), 30-14
FDSRx (FCC data synchronization registers), 30-8
Features list
SIU interrupt controller, 4-8
Features lists
communications processor (CP), 14-4
communications processor module (CPM), 14-1
ATM controller, 31-2
parallel I/O ports, 41-1
CPM multiplexing, 16-2
Ethernet mode, 25-3
fast communications controllers (FCCs)
Fast Ethernet, 36-3
HDLC mode, 37-2
transparent mode, 38-1
G2_LE core, 2-3
HDLC bus controller, 22-21
2
I C controller, 40-2
IDMA emulation, 19-6
implementation-specific, 1-1
memory controller
features list, 11-3
new features supported, 11-1
multi-channel controllers (MCCs), 29-1
processor core, 2-3
RISC timer tables, 14-25
serial communications controllers (SCCs)
AppleTalk mode, 26-2
BISYNC mode, 23-2
general list, 20-2
HDLC mode, 22-2
transparent mode, 24-1
UART mode, 21-2
serial interface, 15-3
serial management controllers (SMCs)
general list, 28-2
transparent mode, 28-23
UART mode, 28-12
UART mode, features not supported, 28-11
Index-10
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serial peripheral interface (SPI), 39-2
timers, 18-2
Floating-point unit (FPU), 2-7
FPSMR register
Ethernet, 36-21
HDLC, 37-8
protocol-specific mode, 30-8
FPU, 2-3
Frame number (FRAME_N), 27-16
FTODRx (FCC transmit-on-demand registers), 30-9
G
G2
features not present on PID6-603e, 2-5
G2_LE core
features, 2-3
branch processing unit, 2-6
completion unit, 2-8
dispatch unit, 2-6
execution units, 2-7
floating-point unit (FPU), 2-7
integer unit (IU), 2-7
load/store unit (LSU), 2-7
System register unit (SRU, 2-8
instruction queue (IQ), 2-6
instruction unit, 2-5
memory subsystem support, 2-8
overview, 2-1
GCI
activation and deactivation, 15-34
programming, 15-34
support, 15-32
General-purpose chip-select machine (GPCM)
common features, 11-6
differences between MPC8xx and MPC8280, 11-66
external access termination, 11-65
implementation differences with UPMs and
SDRAM machine, 11-7
interface signals, 11-55
MPC8xx versus MPC8280, 11-66
overview, 11-55
SRAM configuration, 11-56
strobe signal behavior, 11-56
terminating external accesses, 11-65
timing configuration, 11-56
General-purpose signals, 11-80
GFMR (general FCC mode register), 30-3, 31-91
GMODE (global mode entry), 31-43
GPLn (general-purpose signals), 11-80
GSMR (general SCC mode register)
AppleTalk mode, 26-4
HDLC bus protocol, programming, 22-25
overview, 20-3
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