Motorola PowerQUICC II MPC8280 Series Reference Manual page 1413

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Table 41-8. Port D Dedicated Pin Assignment (PPARD = 1) (continued)
Pin
PDIRD = 1 (Output)
1, 2
PD19 FCC1: TxAddr[4]
MPHY, master,
multiplexed polling
1
FCC2: TxAddr[3]
MPHY, master,
multiplexed polling
1,2
PD18
FCC1: RxAddr[4]
MPHY, master,
multiplexed polling
1
FCC2: RxAddr[3]
MPHY, master,
multiplexed polling
PD17
BRG2: BRGO
1
PD16
FCC1: TxPrty
UTOPIA
(primary option)
PD15
TDM_C2: L1RQ
PD14
TDM_C2: L1CLKO
PD13
SI1: L1ST1
PD12
SI1: L1ST2
PD11
TDMB2: L1RQ
PD10
TDMB2: L1CLKO
PD9
SMC1: SMTXD
1
PD8
FCC2: TxPrty
UTOPIA
MOTOROLA
Freescale Semiconductor, Inc.
Pin Function
PSORD = 0
Default
PDIRD = 0 (Input)
Input
1,3
FCC1: TxAddr[4] 1
GND
MPHY, slave,
multiplexed polling
1,3
FCC1: TxClav3
MPHY, master, direct
polling
1
FCC2: TxAddr[0]
MPHY, slave,
multiplexed polling
1,3
FCC1: RxAddr[4]
GND
MPHY, slave,
multiplexed polling
1,3
FCC1: RxClav3
MPHY, master, direct
polling
1
FCC2: RxAddr[0]
MPHY, slave,
multiplexed polling
FCC1: RxPrty
GND
UTOPIA
(primary option)
TDM_C1:
GND
4
L1TSYNC/GRANT
(secondary option)
1
FCC1: RxD[1]
GND
UTOPIA 16
1
FCC1: RxD[0]
GND
UTOPIA 16
1,4
FCC2: RxD[0]
GND
UTOPIA 8
(secondary option)
1,4
FCC2: RxD[1]
GND
UTOPIA 8
(secondary option)
SMC1: SMRXD
GND
Chapter 41. Parallel I/O Ports
For More Information On This Product,
Go to: www.freescale.com
PSORD = 1
PDIRD = 0 (Input, or
PDIRD = 1 (Output)
Inout if Specified)
BRG1: BRGO
SPI: SPISEL
(primary option)
SPI: SPICLK
(primary option)
SPI: SPIMOSI
SPI: SPIMISO
I2C: I2CSDA
I2C: I2CSCL
TDM_B1: L1TXD
TDM_B1: L1RXD
L1TSYNC/GRANT
BRG4: BRGO
TDM_B1: L1RSYNC
BRG3: BRGO
FCC2: RxPrty
BRG5: BRGO
Ports Tables
Default
Input
V
DD
GND
Inout
V
DD
Inout
SPIMO
Inout
SI
V
DD
Inout
GND
Inout
GND
Inout
GND
Inout
TDM_B1:
GND
GND
1
GND
UTOPIA
41-19

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