Motorola PowerQUICC II MPC8280 Series Reference Manual page 1157

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Table 32-8. AAL1 CES Protocol-Specific TCT Field Descriptions (continued)
Offset
Bits
Name
0x14
0–3
ICASB/SRT
S_TMP
4–15
SP
32.10 Outgoing CAS Status Register (OCASSR)
Figure 32-25 shows the layout of the outgoing CAS block status register (OCASSR).
0
7
Field
Figure 32-25. Outgoing CAS Status Register (OCASSR)
This status register contains sticky bits that give the software application an indication that
the CP has modified the associated CAS block. When the ATM receiver operates in core
CAS modify mode RCT[CCASM=1], the CP generates an interrupt and sets the
appropriate sticky bit in OCASSR each time an AAL1 cell is received with new signaling
information (one or more signaling nibble has changed).
Note that this flag bit stays set until it is cleared by software. If new signaling is received
and the relevant sticky bit is already set, the CP updates the CAS block without generating
another interrupt.
Table 32-9 describes OCASSR fields.
Bits
Name
0–7
Reserved, should be cleared during initialization.
8, 9,
MCASBn Modify CAS Block n.
10, 11,
When the CP updates this outgoing CAS block, it sets the MCASBn sticky bit and generates an
12, 13,
interrupt to notify the core that the signaling information has changed in block n. Each channel
14, 15
selects the CAS block number in its RCT; see Section 32.9.1.1, "AAL1 CES Protocol-Specific
RCT."
MOTOROLA
Freescale Semiconductor, Inc.
ICASB applies when in CAS mode. Incoming CAS Block. Points to one of the eight
available internal CAS block. The starting address of the table is
IN_CAS_BLOCK_BASE+ICASB × 32. See Section 32.4.7.1, "CAS Routing Table" for
more details.
Note that the RCT and TCT use the same CAS routing table (CRT).
SRTS_TMP applies when not in CAS mode. Before a cell with SN = 1 is sent, the CP
reads the SRTS code from external SRTS logic, writes it to SRTS_TMP, and then
inserts SRTS_TMP into the next four cells with an odd SN.
Structured pointer. Used by the CP to calculate the structured pointer. Initialize to 0.
Structured format only.
8
9
10
MCASB7 MCASB6 MCASB5 MCASB4 MCASB3 MCASB2 MCASB1 MCASB0
Table 32-9. OCASSR Field Descriptions
Chapter 32. ATM AAL1 Circuit Emulation Service
For More Information On This Product,
Go to: www.freescale.com
Outgoing CAS Status Register (OCASSR)
Description
11
12
13
Description
14
15
32-37

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