Motorola PowerQUICC II MPC8280 Series Reference Manual page 1071

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Table 31-21. TCT Field Descriptions (continued)
Offset
Bits
Name
0x02
0
1
INF
2–11
12
ABRF
13–15
AAL
0x04
TxDBPTR Tx data buffer pointer. Holds the real address of the current position in the Tx buffer.
0x08
TBDCNT
0x0A
TBD_OffSet Transmit BD offset. Holds offset from TBD_BASE of the current BD. Should be cleared
0x0C
0–7
Rate
Reminder
8–15
PCR
Fraction
0x0E
PCR
0x10
0x16
APCLC
0x18
ATMCH
MOTOROLA
Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
Internal use only. Should be cleared.
Used for AAL5 Only. Indicates the transmitter state. Initialize to 0
0 In idle state.
1 In AAL5 frame transmission state.
Internal use only. Should be cleared.
Used for AAL5 Only.
0 ABR Flow control is disabled.
1 ABR Flow control is enabled.
AAL type
000 AAL0—Reassembly with no adaptation layer
001 AAL1—ATM adaptation layer 1 protocol
010 AAL5—ATM adaptation layer 5 protocol
100 AAL2—ATM adaptation layer 2 protocol. Refer to Chapter 33, "ATM AAL2."
101 AAL1_CES—Refer to Chapter 32, "ATM AAL1 Circuit Emulation Service."
All others reserved.
Transmit BD count. Counts the remaining data to transmit in the current transmit buffer.
Its initial value is loaded from the data length field of the TxBD when a new buffer is open;
its value is subtracted for any transmitted cell associated with this channel.
initially.
Rate remainder. Used by the APC to hold the rate remainder after adding the pace
fraction to the additive channel rate. Should be cleared initially.
Peak cell rate fraction. Holds the peak cell rate fraction of this channel in units of 1/256
slot. If this is an ABR channel, this field is automatically updated by the CP.
Peak cell rate. Holds the peak cell rate (in units of APC slots) permitted for this channel
according to the traffic contract. Note that for an ABR channel, the CP automatically
updates PCR to the ACR value.
Protocol-specific
APC linked channel. Used by the CP. Initialize to 0 (null pointer).
ATM cell header. Holds the full (4-byte) ATM cell header of the current channel. The
transmitter appends ATMCH to the cell payload during transmission.
For More Information On This Product,
Go to: www.freescale.com
ATM Memory Structure
Description
31-57

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