Motorola PowerQUICC II MPC8280 Series Reference Manual page 753

Error
CTS Lost When CTS negates during transmission, the channel stops after finishing the current character. The
during CP sets TxBD[CT] and generates the TX interrupt if it is not masked. The channel resumes
Character transmission after the
Transmission Note that if CTS is used, the UART also offers an asynchronous flow control option that does not
generate an error. See the description of PSMR[FLC] in Table 21-9.
Reception errors are described in Table 21-8.
Error
Overrun Occurs when the channel overwrites the previous character in the Rx FIFO with a new character, losing
the previous character. The channel then writes the new character to the buffer, closes it, sets
RxBD[OV], and generates an RX interrupt if not masked. In automatic multidrop mode, the receiver
enters hunt mode immediately.
CD Lost If this error occurs and the channel is using this pin to automatically control reception, the channel
during terminates character reception, closes the buffer, sets RxBD[CD], and generates the RX interrupt if not
Character masked. This error has the highest priority. The last character in the buffer is lost and other errors are
Reception not checked. In automatic multidrop mode, the receiver enters the hunt mode immediately.
Parity When a parity error occurs, the channel writes the received character to the buffer, closes the buffer,
sets RxBD[PR], and generates the RX interrupt if not masked. The channel also increments the parity
error counter PAREC. In automatic multidrop mode, the receiver enters hunt mode immediately.
Noise A noise error occurs when the three samples of a bit are not identical. When this error occurs, the
channel writes the received character to the buffer, proceeds normally, but increments the noise error
counter NOSEC. Note that this error does not occur in synchronous mode.
Idle Sequence If the UART is receiving data and gets an idle character (all ones), the channel begins counting
Receive consecutive idle characters received. If MAX_IDL is reached, the buffer is closed and an RX interrupt
is generated if not masked. If no buffer is open, this event does not generate an interrupt or any status
information. The internal idle counter (IDLC) is reset every time a character is received. To disable the
idle sequence function, clear MAX_IDL.
Framing The UART reports a framing errors when it receives a character with no stop bit, regardless of the
mode. The channel writes the received character to the buffer, closes it, sets RxBD[FR], generates the
RX interrupt if not masked, increments FRMEC, but does not check parity for this character. In
automatic multidrop mode, the receiver immediately enters hunt mode. If the UART allows data with no
stop bits (PSMR[RZS] = 1) when in synchronous mode (PSMR[SYN] = 1), framing errors are reported
but reception continues assuming the unexpected zero is the start bit of the next character; in this case,
the user may ignore a reported framing error until multiple framing errors occur within a short period.
Break When the first break sequence is received, the UART increments the break error counter BRKEC. It
Sequence updates BRKLN when the sequence completes. After the first 1 is received, the UART sets
SCCE[BRKE], which generates an interrupt if not masked. If the UART is receiving characters when it
receives a break, it closes the Rx buffer, sets RxBD[BR], and sets SCCE[RX], which can generate an
interrupt if not masked. If PSMR[RZS] = 1 when the UART is in synchronous mode, a break sequence
is detected after two successive break characters are received.
MOTOROLA
Freescale Semiconductor, Inc.
Table 21-7. Transmission Errors
command is issued and CTS is asserted.
RESTART TRANSMIT
Table 21-8. Reception Errors
Chapter 21. SCC UART Mode
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Handling Errors in the SCC UART Controller
Description
Description
21-13