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MCC Tx pointer
MCC Tx pointer
MCC Tx pointer
MCC Tx pointer
32.6 3-Step-SN Algorithm
The 3-step-SN algorithm is a fast and efficient state machine that has the ability to recover
one lost or misinserted cell. The 3-step-SN algorithm does not add significant delay to the
MOTOROLA
Freescale Semiconductor, Inc.
ATM-to-TDM
BD table
0
BD 1
ATM Rx pointer
0
BD 2
MCC_Start
0
BD 3
0
BD 4
0
BD 5
0
BD 6
0
BD 7
W
ATM-to-TDM
BD table
1
BD 1
1
BD 2
MCC_Start
1
BD 3
0
BD 4
ATM Rx pointer
0
BD 5
0
BD 6
0
BD 7
W
ATM-to-TDM
BD table
0
BD 1
0
BD 2
1
BD 3
1
BD 4
1
BD 5
1
BD 6
0
BD 7
W
ATM Rx pointer
ATM-to-TDM
BD table
1
BD 1
ATM Rx pointer
0
BD 2
1
BD 3
ATM_Start
1
BD 4
CESAC=6
1
BD 5
1
BD 6
1
BD 7
W
Figure 32-17. Pre-Overrun Sequence
Chapter 32. ATM AAL1 Circuit Emulation Service
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3-Step-SN Algorithm
Step 1:
Initialize the MCC and ATM pointers
to the same BD table.
CESAC=0
MCC_Start=3, MCC_Stop=1
ATM_Start=5, ATM_Stop=7-1=6
Step 2:
When CESAC reaches MCC_Start,
the MCC starts transmitting.
CESAC=3
MCC_Start=3, MCC_Stop=1
ATM_Start=5, ATM_Stop=7-1=6
Step 3:
The MCC reads the data slower than
the ATM fills it. The ATM points to the
last BD in the common BD table.
CESAC=4
MCC_Start=3, MCC_Stop=1
ATM_Start=5, ATM_Stop=7-1=6
Step 4:
The ATM wraps around, and CESAC
reaches the ATM_Stop threshold. The
ATM write pointer freezes on the
current BD.
The MCC continues to process the
valid data. When the CESAC falls to the
ATM_Start threshold, the ATM advances
to the first BD after EOSF.
Step 5:
After CESAC reaches the ATM_Start
threshold and the ATM advances to the
BD after EOSF, the ATM resynchronizes
and starts to receive valid data using
the new BD (start of SF).
32-21
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