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Current Slot
Figure 31-1. APC Scheduling Table Mechanism
Each 2-byte time-slot entry points to one ATM channel. Additional channels scheduled to
transmit in the same slot are linked to each other using the APC linked-channel field in the
TCT. The linked list is not limited; however, if the number of channels for the current slot
exceeds the cells per slot parameter (CPS), the extra channels are sent in subsequent time
slots. (The rescheduling of extra channels is based on the original slot to maintain each
channel's pace.)
Note that a channel can appear only once in the scheduling table at a given time, because
each channel has only one APC linked-channel field.
31.3.3 Determining the Scheduling Table Size
The following sections describe how to determine the number of cells sent per time slot and
the total number of slots needed in a scheduling table.
31.3.3.1 Determining the Cells Per Slot (CPS) in a Scheduling Table
The number of cells sent per time slot is determined by the channel with the maximum bit
rate; see equation A. The maximum bit rate is achieved when a channel is rescheduled to
the next slot. For example, if the line rate is 155.52 Mbps and there are eight cells per slot,
equation A yields a maximum VC rate of 19.44 Mbps.
(A)
Note that a channel can appear only once per time slot; thus, 19.44 Mbps = 155.52Mbps/8.
The cells per slot parameter (CPS) affects the cell delay variation (CDV). Because the APC
unit does not put cells in a definite order within each time slot (LIFO—last-in/first-out
implementation), as CPS increases, the CDV increases. However as CPS decreases, the size
of the scheduling table in the dual-port RAM increases and more CPM bandwidth is
required.
MOTOROLA
Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
9
5
6
1
4
7
8
Number of Slots
Max bit rate =
For More Information On This Product,
Go to: www.freescale.com
ATM Pace Control (APC) Unit
3
2
Cell Rescheduling
line rate
cells per slot
31-11
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