Motorola PowerQUICC II MPC8280 Series Reference Manual page 1147

Offset Name
0x4A INT_RTCRT_BASE
0x58 EXT_RTCRT_BASE Word
0xB2 AAL1_INT_RX_CRT Hword (CES only) Points to a reserved scratchpad area of 32 bytes in the dual-port
0xd0 OCASSR
0xE0 TCELL_TMP_BASE
_EXT
0xE4 IN_CAS_BLOCK_B
ASE
0xE6 OUT_CAS_BLOCK_
BASE
0xE8 AAL1_Int_STATT_B
ASE
0xEA AAL1_DUMMY_CEL
L_BASE
0xEC CATB
0xF0 AAL1_Ext_STATT_B
ASE
32.9 Receive and Transmit Connection Tables
(RCT, TCT)
The connection tables, RCT and TCT, hold channel configuration and temporary
parameters for each receive and transmit channel (AAL type, connection traffic parameters,
BDs' parameters and temporary parameters used during segmentation and reassembly).
The internal connection tables hold parameters for up to 128 channels (channels 0–127). In
extended channel mode, parameters for channels 256 and above are kept in external
MOTOROLA
Freescale Semiconductor, Inc.
Receive and Transmit Connection Tables (RCT, TCT)
Table 32-4. AAL1 CES Parameters
Width
Hword Internal receive/transmit CAS routing table extension base. User-defined. Note
that because AAL1 CES does not need the TCT extension, the AAL1 CES
microcode uses this Hword to point to a CAS routing table. Should be 32 byte
aligned. User-defined.
External receive/transmit CAS routing table extension base. User-defined. Note
that because AAL1 CES does not need the TCT extension, the AAL1 CES
microcode uses this word to point to a CAS routing table.
RAM used by the CES microcode. Should be 32 byte aligned. User-defined.
Byte Outgoing CAS Status Register. See Section 32.10, "Outgoing CAS Status
Register (OCASSR)."
Word Transmit Cell Temporary base address (64-byte aligned). Points to an external
memory block reserved for partially filled cells (64 octets for each CES
channel). This area is allocated by the user but used by the CP.
Hword Incoming CAS Block Base (depicted in Figure 32-12). Points to dual-port RAM.
Should be 32-byte aligned. User-defined.
Hword Outgoing CAS Block Base (depicted in Figure 32-10). Points to dual-port RAM.
Should be 32-byte aligned. User-defined.
Hword AAL1 Internal Statistics Table Base. Points to dual-port RAM. Should be 16-byte
aligned. User-defined. See Section 32.15, "Internal AAL1 CES Statistics
"
Tables.
Hword ALL1 Dummy cell base address. Points to dual-port RAM area contains the
AAL1 dummy cell template (little-endian format). Should be 64-byte aligned.
User-defined.
Hword CES adaptive threshold tables base address. Points to the dual-port RAM area
containing the CES slip control thresholds and the adaptive counter See
Section 32.15, "Internal AAL1 CES Statistics Tables.
(8 octets for each AAL1-MCC channel). User-defined and should match the
CATB value programmed in the MCC parameter RAM; see Section 29.3.3,
"MCC Parameters for AAL1 CES Usage."
Word AAL1 External Statistics Table Base. Points to External memory. Should be
16-byte aligned (16 octets for each AAL1 channel).User-defined. See
Section 32.16, "External AAL1 CES Statistics Tables
Chapter 32. ATM AAL1 Circuit Emulation Service
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Description
"
Should be 8-byte aligned
."
32-27