Motorola PowerQUICC II MPC8280 Series Reference Manual page 1429

Most-significant bit (msb). Highest-order bit in an address, registers, data
Most-significant byte (MSB). Highest-order byte in an address, registers,
N
No-op. No-operation. A single-cycle operation that does not affect registers
O
OEA (operating environment architecture). Level of the architecture that
Optional. A feature, such as an instruction, a register, or an exception, that is
Out-of-order. An aspect of an operation that allows it to be performed ahead
Out-of-order execution. A technique that allows instructions to be issued
Overflow. An error condition that occurs during arithmetic operations when
P
Pace control. Controls the rate of the data flow between a master and slave.
Page. Region in memory. The OEA defines a page as a 4-Kbyte area of
Page fault. Condition that occurs when the processor attempts to access a
MOTOROLA
Freescale Semiconductor, Inc.
element, or instruction encoding.
data element, or instruction encoding.
or generate bus activity.
describes PowerPC memory management model, supervisor-level
registers, synchronization requirements, and the exception model. It
also defines the time-base feature from a supervisor-level
perspective. Implementations that conform to the PowerPC OEA
also conform to the PowerPC UISA and VEA.
defined by the PowerPC architecture but not required to be
implemented.
of one that may have preceded it in the sequential model, for
example, speculative operations. An operation is said to be
performed out-of-order if, at the time that it is performed, it is not
known to be required by the sequential execution model. See
In-order.
and completed in an order that differs from their sequence in the
instruction stream.
the result cannot be stored accurately in the destination register(s).
For example, if two 32-bit numbers are multiplied, the result may not
be representable in 32 bits.
memory, aligned on a 4-Kbyte boundary.
memory location that does not reside within a page not currently
resident in physical memory. On processors that implement the
Glossary of Terms and Abbreviations
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Glossary-7