Motorola PowerQUICC II MPC8280 Series Reference Manual page 861

Additionally, when using the packet-level interface described in Section 27.5.1.1,
"Packet-Level Interface," the tokens must be prepared by the software.
Because the MPC8280 USB host controller does not integrate the root hub, an external hub
is required when more than one device is connected to the host.
Also note that the host controller programming model does not conform to the open host
controller interface (OHCI) or universal host controller interface (UHCI) standards in
which software drivers are hardware-independent.
27.3.1 USB Controller Pin Functions and Clocking
The USB controller interfaces to the USB bus through a differential line driver and
differential line receiver. The OE (output enable) signal enables the line driver when the
USB controller transmits on the bus.
The reference clock for the USB controller (USBCLK) is used by the DPLL circuitry to
recover the bit rate clock. The source for USBCLK is selected in CMXSCR[TS4CS] (refer
to Section 16.4.3, "CMX SI2 Clock Route Register (CMXSI2CR)"). The MPC8280 can
run at different frequencies, but the USB reference clock must be four times the USB bit
rate. Thus, USBCLK must be 48 MHz for a 12-Mbps full-speed transfer or 6 MHz for a
1.5-Mbps low-speed transfer.
MOTOROLA
Freescale Semiconductor, Inc.
MPC8280
transceiver
USBOE
USBTXP
USBTXN
USBRXD
USBRXP
USBRXN
Figure 27-1. USB Interface
Chapter 27. Universal Serial Bus Controller
For More Information On This Product,
Go to: www.freescale.com
Host Controller Limitations
USB
D+
D–
+
–
27-3