Motorola PowerQUICC II MPC8280 Series Reference Manual page 613

determines whether this RAM has a shadow for changing SIx RAM entries while the TDM
channel is active. This reduces the number of available SIx RAM entries for that TDM.
15.4.1 One Multiplexed Channel with Static Frames
The example in Figure 15-5. shows one of many possible settings. With this configuration,
the SIx RAM has 256 entries for transmit data and strobe routing and 256 entries for receive
data and strobe routing. This configuration should be chosen only when one TDM is
required and the routing on that TDM does not need to be dynamically changed. The
number of entries available in the SIx RAM is determined by the user.
SIx RAM address:
(each entry is16 bits wide)
Figure 15-5. One TDM Channel with Static Frames and Independent Rx and Tx
15.4.2 One Multiplexed Channel with Dynamic Frames
In the configuration shown in Figure 15-6., one multiplexed channel has 256 entries for
transmit data and strobe routing and 256 entries for receive data and strobe routing. Each
RAM has two sections, the current-route RAM and a shadow RAM for changing serial
routing dynamically.
After programming the shadow RAM, the user sets SIxCMDR[CSRxn] for the associated
channel. When the next frame sync arrives, the SI automatically exchanges the
current-route RAM for the shadow RAM. See Section 15.4.5, "Static and Dynamic
Routing."
MOTOROLA Chapter 15. Serial Interface with Time-Slot Assigner
Freescale Semiconductor, Inc.
0
256 Entries
TXa
Route
511
1024
256 Entries
RXa
Route
1535
Routes
For More Information On This Product,
Go to: www.freescale.com
Serial Interface RAM
Framing Signals
L1TCLKax
L1TSYNCax
L1RCLKax
L1RSYNCax
15-9