Motorola PowerQUICC II MPC8280 Series Reference Manual page 1272

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IMA Software Interface and Requirements
single channel (either by changing RICPCH for all the links to be the same or by clearing
the MON_ICP bit):
ILRCNTL[MON_ICP] = 0. Note, at least 1 link in the group must have this bit set.
34.5.4.3
Group Start-up Procedure
The IMA Frame Synchronization Mechanism (IFSM) is initiated when a link is switched
to "group assigned." However, before that happens, management software must have
programmed the group parameters based upon the received/negotiated values in ICP cells:
• IMA ID (RIMAID)
• IMA Version (IMAVER)
• IMA Frame Size (RM)
There are other parameters that don't depend on ICP information for programmability.
Therefore, it is the assumption that they have been initialized prior to the start of the IFSM.
Start the IFSM by setting each link in the group to "Group Assigned":
• Set ILRCNTL[GA] to 1 (one).
Management software must now wait until each link in the group has achieved IMA frame
synchronization. For each link in the group that was "group assigned" an IFSW (IMA
Frame Synchronization Working) event is generated. See section "IMA Exceptions."
Having achieved frame synchronization, software can now enable the Group Delay
Synchronization (GDS) mechanism (i.e., finding link with shortest delay and buffering
accordingly via DCB).
• Configure group order table with the ascending link order (round robin distribution)
to be used when reconstructing the ATM stream.
• Set the corresponding PHY bit in REF_LINK.
• Set IGRSTATE[GDSS] to 1 (one) to enable GDS.
Once group delay synchronization is achieved, a "GDS" exception is generated. At this
point, ATM stream reconstruction can take place. In order for stream reconstruction to be
performed by the MPC8280, the user must switch all links and corresponding group (both
directions) to "active" mode (i.e., capable of receiving data cells). Set RX to "active" first,
to avoid having the transmitter generate a data stream when the opposite end is not ready:
• Set ILRCNTL[RXSC] to 1 (one) to enable reception of data cells at the link level.
• Set IGRCNTL[RXSC] to 1 (one) to enable reception of data cells at the group level.
• Set ILTCNTL[TXSC] to 1 (one) to enable transmission of data cells at the link level.
• Set IGTCNTL[TXSC] to 1 (one) to enable reception of data cells at the group level.
34-62
Freescale Semiconductor, Inc.
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
MOTOROLA

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