Motorola PowerQUICC II MPC8280 Series Reference Manual page 1227

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2. The non-TRL tasks do not determine when to perform stuffing on the non-TRL
links. When the TRL flags 'imminent stuff' on its own link, it will flag 'imminent
stuff' on all of the non-TRL links as well. Thus, the non-TRL links will also stuff
their links every 2048 cells.
3. The non-TRL queue depths are the same as the TRL's queue (i.e. 4 cells).
34.3.3 Receive Architecture
The receive task consists of three parts. The first part is for cell reception from the link. The
second part provides the trigger for activating the cell processing task, including timing
recovery if desired. The third part performs the actual cell processing (i.e. passing cells to
the ATM layer). The cell reception task services requests from the links (via the UTOPIA
multi-PHY interface and the FCC), maintains the link state, and (if the link and group state
dictates) writes the received cells into the link's delay compensation buffer in external
memory. The cell processing activation function coordinates passing cells from the cell
reception task, on either an on-demand basis or at a rate determined by the reconstructed
IDCR (IMA data cell rate). The cell processing task extracts cells from the delay
compensation buffers and passes them to the ATM layer for processing.
Cell Processing Activation Function
MOTOROLA
Freescale Semiconductor, Inc.
Cell Processing
Task
Cell Reception
Task
UTOPIA Multi-PHY
Figure 34-10. IMA Receive Task Interaction
Chapter 34. Inverse Multiplexing for ATM (IMA)
For More Information On This Product,
Go to: www.freescale.com
IMA Microcode Architecture
Delay
Compensation
Buffers
34-17

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