Motorola PowerQUICC II MPC8280 Series Reference Manual page 1057

31.10.1.2 VCI Filtering (VCIF)
VCI filtering enable bits are shown in Figure 31-22.
0 1 2
Field 0 0 0
Table 31-13 describes the operation of the VCI filtering enable bits.
Table 31-13. VCI Filtering Enable Field Descriptions
Bits Name
0–2, 5 — Clear these bits.
3, 4, 6, VCx VCI filtering enable
7–15 0 Do not send cells with this VCI to the raw cell queue.
1 Send cells with this VCI to the raw cell queue.
31.10.1.3 Global Mode Entry (GMODE)
Figure 31-23 shows the layout of the global mode entry (GMODE).
0 1 2 3
Field 0 0 GBL 0
1
MPC8264 and MPC8266 only.
Table 31-14 describes GMODE fields.
Bits Name
0–1 — Reserved, should be cleared.
2 GBL Global. Asserting GBL enables snooping of connection tables. GBL should not be asserted if any of
the related DMAs will access the local bus.
3–5 — Reserved, should be cleared.
6 ALB Address look up bus for CAM or address compression tables
0 Reside on the 60x bus.
1 Reside on the local bus.
7 CTB External connection tables bus
0 Reside on the 60x bus.
1 Reside on the local bus.
MOTOROLA Chapter 31. ATM Controller and AAL0, AAL1, and AAL5
Freescale Semiconductor, Inc.
3 4 5 6 7
VC3 VC4 0 VC6 VC7 VC8 VC9 VC10 VC11 VC12 VC13 VC14 VC15
Figure 31-22. VCI Filtering Enable Bits
4 5 6 7
0 0 ALB CTB REM
Figure 31-23. Global Mode Entry (GMODE)
Table 31-14. GMODE Field Descriptions
For More Information On This Product,
Go to: www.freescale.com
8 9 10 11
Description
8 9 10 11
1
0 IMA_EN UEAD CUAB EVPT
Description
ATM Memory Structure
12 13 14 15
12 13 14 15
0 ALM
31-43