Motorola PowerQUICC II MPC8280 Series Reference Manual page 1399

0 1 2
1 1 1
Field SO0 SO1 SO2
Reset
R/W
Addr 0x10D08 (PSORA), 0x10D28 (PSORB), 0x10D48 (PSORC), 0x10D68 (PSORD)
16 17 18
Field SO16 SO17 SO18 SO19 SO20 SO21 SO22 SO23 SO24 SO25 SO26 SO27 SO28 SO29 SO30 SO31
Reset
R/W
Addr 0x10D0A (PSORA), 0x10D2A (PSORB), 0x10D4A (PSORC), 0x10D6A (PSORD)
1
These bits are valid for PSORA and PSORC only
Figure 41-5. Special Options Registers (PSORA–POSRD)
PSOR bits are effective only if the corresponding PPARx[DDx] = 1 (a dedicated peripheral
function). Table 41-4 describes PSORx fields.
Bits Name
0–31 SOx Special-option. Determines whether a pin configured for a dedicated function (PPARx[DDx] = 1)
uses option 1 or option 2. Note that bits SO0–SO3 are valid for PSORA and PSORC only. Options
are described in Section 41.2, "Port Registers."
0 Dedicated peripheral function. Option 1.
1 Dedicated peripheral function. Option 2.
If the corresponding PPARx[DDx] = 1 (configured as a
general-purpose pin) before programming a PSORx or PDIRx
bit, a pin might function for a short period as an unwanted
dedicated function and cause unknown behavior.
MOTOROLA
Freescale Semiconductor, Inc.
3 4 5 6
1
SO3 SO4 SO5 SO6
0000_0000_0000_0000
19 20 21 22
0000_0000_0000_0000
Table 41-4. PSORx Field Descriptions
NOTE
Chapter 41. Parallel I/O Ports
For More Information On This Product,
Go to: www.freescale.com
7 8 9 10
SO7 SO8 SO9 SO10 SO11 SO12 SO13 SO14 SO15
R/W
23 24 25 26
R/W
Description
Port Registers
11 12 13 14 15
27 28 29 30 31
41-5