SDRAM Machine
CLK
ALE
CS
SDRAS
SDCAS
MA[0–11]
WE
DQM
Data
Figure 11-32. SDRAM Single-Beat Write, Page Hit
CLK
ALE
CS
SDRAS
SDCAS
MA[0–11]
Row
WE
DQM
Data
Figure 11-33. SDRAM Three-Beat Burst Write, Page Closed
CLK
ALE
CS
SDRAS
SDCAS
Z
MA[0–11]
WE
DQM
Data
DQM latency (affects negation only) = 2
Figure 11-34. SDRAM Read-after-Read Pipeline, Page Hit, CL = 3
11-48
Freescale Semiconductor, Inc.
D0
Column
D0
D1
D2
Column1
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Column
Column2
D0
D1
D0
D1
MOTOROLA