Motorola PowerQUICC II MPC8280 Series Reference Manual page 1407

Table 41-6. Port B Dedicated Pin Assignment (PPARB = 1) (continued)
Pin
PDIRB = 1 (Output)
PB21
PB20
PB19
PB18
PB17 TDM_A1: L1RQ
PB16 TDM_A1: L1CLKO
PB15 FCC3: TX_ER
MII
PB14 FCC3: TX_EN
MII/RMII
PB13 TDM_B1: L1RQ
PB12 TDM_B1: L1CLKO
1
PB11 FCC2: TxD[0]
UTOPIA 8
MOTOROLA
Freescale Semiconductor, Inc.
Pin Function
PSORB = 0
Default
PDIRB = 0 (Input)
Input
FCC2: RxD[7] GND
UTOPIA 8
FCC2: RxD[0]
MII/HDLC nibble
FCC2: RxD[0]
RMII dibit
FCC2: RxD
HDLC/transp. serial
FCC2: RxD[6] GND
UTOPIA 8
FCC2: RxD[1]
MII/HDLC nibble
FCC2: RxD[1]
RMII dibit
1
FCC2: RxD[5] GND
UTOPIA 8
FCC2: RxD[2]
MII/HDLC nibble
FCC2: RxD[4] GND
UTOPIA 8
FCC2: RxD[3]
MII/HDLC nibble
FCC3: RX_DV GND
MII
FCC3: CRS_DV
RMII
FCC3: RX_ER GND
MII/RMII
SCC2: RXD by
(primary option) PD28
SCC3: RXD by
(primary option) PD25
FCC3: COL GND
MII
FCC3: CRS GND
MII
FCC3: RxD[3] GND
MII/HDLC nibble
Chapter 41. Parallel I/O Ports
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PSORB = 1
PDIRB = 0 (Input or
PDIRB = 1 (Output)
Inout if Specified)
TDM_A1: L1TXD[2]
Nibble L1TSYNC/GRANT
TDM_A1-L1TXD[1] TDM_D2: L1RSYNC
Nibble
TDM_D2: L1RQ TDM_A2: L1RXD[3]
TDM_D2: L1CLKO TDM A2: L1RXD[2]
TDM_C1: L1TXD
(primary option)
TDM_C1: L1RXD
(primary option)
TDM_A2: L1TXD[1]
Nibble L1TSYNC/GRANT
(primary option)
SCC2: TXD TDM_C1: L1RSYNC
(primary option)
TDM_D1: L1TXD
(primary option)
Ports Tables
Default
Input
TDM_D2: GND
GND
GND
Nibble
GND
Nibble
CLK17 GND
CLK18 GND
by
Inout PD28
by
Inout PD27
TDM_C1: by
PD16
by
PD26
by
Inout PD25
41-13