Motorola PowerQUICC II MPC8280 Series Reference Manual page 698

IDMA Operation
Table 19-5. DCM Field Descriptions (continued)
Bits Name
12 ERM External request mode.
0 The CP transfers continuously, as if an external level request is asserted, regardless of the
DREQ signal assertion. The CP stops the transfer when there are no more valid BDs or after
a
STOP
1 The CP responds to DREQ as configured (edge/level) by performing single- or dual-address
transfers. The CP also responds to DONE assertions.
Note: Memory-to-memory transfers (S/D=00) with external request (ERM=1) is allowed, but
DONE assertion is not supported in this mode (DONE should be disabled).
13 DT DONE treatment:
0 After external DONE assertion, the IDMA ignores further DREQ assertions. The CP closes
the current BD and IDMA stops.
another DREQ.
1 After external DONE assertion, the CP closes the current BD. The IDMA continues to the next
BD when DREQ is asserted.
14–15 S/D Source/destination is a peripheral device or memory. See Table 19-6..
00 Read from memory, write to memory.
10 Read from peripheral, write to memory.
01 Read from memory, write to peripheral.
11 Reserved
When a device is a peripheral:
• DACK is asserted during transfers to/from it.
• It may assert DONE to terminate all accesses to/from it.
• It can be operated in fly-by mode—respond to DACK ignoring the address.
• It gets highest DMA priority on the bus arbiter and the lowest DMA latency available.
19.8.2.2 Data Transfer Types as Programmed in DCM
Table 19-6 summarizes the types of data transfers according to the DCM programming.
Table 19-6. IDMA Channel Data Transfer Operation
S/D FB Read From
01 0 Memory
(STS = SS_MAX)
10 0 Peripheral
(STS = port size or
32)
00 0 Memory
(STS = SS_MAX)
19-22
Freescale Semiconductor, Inc.
_ command is issued. DONE assertion by a external device is ignored.
IDMA
Write To
Peripheral Read from memory: Filling internal buffer in one DMA transfer.
(DTS = port size On the bus: one burst or more, depends on STS
or 32)
Write to peripheral: In smaller transfers until internal buffer empties.
On the bus: singles or burst, depends on DTS
Memory Read from peripheral: Filling internal buffer in several DMA
(DTS = transfers.
SS_MAX) On the bus: singles or burst, depends on STS
Write to memory: in one DMA transfer, internal buffer empties.
On the bus: one burst or more, depends on DTS
Memory Read from memory: Filling internal buffer in one DMA transfer.
(DTS = SS_MAX On the bus: one burst or more, depends on STS
or less)
Write to memory: in one transfer or more until internal buffer
empties.
On the bus: singles or bursts, depends on DTS
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Description
_ command should be issued before assertion of
START IDMA
Description (Steady-State Operation)
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