Motorola PowerQUICC II MPC8280 Series Reference Manual page 591

Table 14-8. Command Descriptions (continued)
Command
GCI abort request. The GCI receiver sends an abort request on the E-bit.
GCI ABORT
REQUEST
GCI time-out. The GCI performs the timeout function.
GCI TIMEOUT
Reset block check sequence. Used in BISYNC mode to reset the block check sequence calculation.
RESET BCS
See Section 29.7, "MCC Commands."
MCC STOP
TRANSMIT
See Section 29.7, "MCC Commands."
MCC STOP
RECEIVE
MCC reset. Provides a hard reset to the MCC FIFOs. See Section 29.7, "MCC Commands." To use
MCC RESET
this command, software should execute the following sequence:
1 Disable the TDM by clearing the appropriate enable bit in SIxGMR[4-7] (See Table 14-4, "SIxGMR
Field Descriptions.").
2 Issue the MCC RSET command.
3 Issue the INIT RX AND TX command.
4 Reprogram the specific MCC channel, global parameters, and any BDs that need to be updated.
5 Set the appropriate enable bit in SIxGMR[4-7]. (See Table 14-4, "SIxGMR Field Descriptions.").
ATM TRANSMIT 1
See Section 31.14, "ATM Transmit Command."
Generate a random number and put it in dual-port RAM; see RAND in Table 14-10.
RANDOM NUMBER
IMA VERSION IMA version change. This command allows users to change the IMA version (1.0 or 1.1) for one IMA
2
CHANGE group on the fly without software intervention.
1
Not available on the MPC8270.
2
MPC8280 only.
14.4.2 Command Register Example
To perform a complete reset of the CP, the value 0x8001_0000 should be written to the
CPCR. Following this command, the CPCR returns the value 0x0000_0000 after two
clocks.
14.4.3 Command Execution Latency
The worst-case command execution latency is 200 clocks and the typical command
execution latency is about 40 clocks.
MOTOROLA Chapter 14. Communications Processor Module Overview
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Description
Command Set
14-17