Motorola PowerQUICC II MPC8280 Series Reference Manual page 947

To enable an interrupt, set the corresponding bit. If a bit is cleared, no interrupt request is
generated and no new entry is written in the circular interrupt table. The user must initialize
INTMSK prior to operation. Reserved bits should remain cleared.
29.3.1.3 Channel Mode Register (CHAMR)—HDLC Mode
The channel mode register (CHAMR) is a user-initialized register, shown in Figure 29-4.
For a descriptions of CHAMR in transparent and SS7 modes, refer to Section 29.3.2.3 and
Section 29.3.4.1 respectively. For channels that are used in conjunction with CES
functionality, the user should refer to Section 29.3.3.2, "Channel Mode Register
(CHAMR)—AAL1 CES," for additional information.
0 1
Field MODE POL
Reset
R/W
Offset
Figure 29-4. Channel Mode Register (CHAMR)
CHAMR fields are described in Table 29-4.
Bits Name
0 MODE This mode bit determines whether the HDLC or transparent mode is used. It also determines how
other CHAMR bits are interpreted.
0 Transparent mode. See Section 29.3.2.3, "Channel Mode Register (CHAMR)—Transparent
Mode."
1 HDLC mode
1 POL Enable polling. POL enables the transmitter to poll the TxBDs.
0 Polling is disabled (The CPM does not access the external bus to check the R bit in the TxBD).
1 Polling is enabled.
POL is used to optimize the use of the external bus. Software should always set POL at the
beginning of a transmit sequence of one or more frames. The CP clears POL when no more buffers
are ready in the transmit queue, i.e. when it finds a BD with R = 0 (for example, at the end of a frame
or at the end of a multi-frame transmission). To minimize useless transactions on the external bus,
software should always prepare the new BD, or multiple BDs, and set BD[R] before enabling polling.
2 1 Must be set.
MOTOROLA
Freescale Semiconductor, Inc.
2 3 4 5 6
1 IDLM — RD
Table 29-4. CHAMR Field Descriptions
Chapter 29. Multi-Channel Controllers (MCCs)
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Channel-Specific Parameters
7 8 9 10
— CRC — TS
—
R/W
0x1A
Description
11 12 13 15
RQN NOF
29-9