Motorola PowerQUICC II MPC8280 Series Reference Manual page 1056

ATM Memory Structure
Table 31-11. ATM Parameter RAM Map (continued)
1
Offset Name
0x9C SRTS_BASE
0xA0 IDLE/UNASSIGN_BASE Hword Idle/unassign cell base address. Points to dual-port RAM area contains
0xA2 IDLE/UNASSIGN_SIZE Hword Idle/unassign cell size. 52 in regular mode; 53–64 in UDC mode.
0xA4 EPAYLOAD
0xA8 Trm
0xAC Nrm
0xAE Mrm
0xB0 TCR
0xB2 ABR_RX_TCTE
— Additional parameters
1
Offset from FCC base: 0x8400 (FCC1) and 0x8500 (FCC2); see Section 14.5.2, "Parameter RAM."
31.10.1.1 Determining UEAD_OFFSET (UEAD Mode Only)
The UEAD_OFFSET value is based on the position of the user-defined extended address
(UEAD) in the UDC extra header. Table 31-12 shows how to determine UEAD_OFFSET:
first determine the halfword-aligned location of the UEAD, and then read the
corresponding UEAD_OFFSET value.
Offset
Table 31-12. UEAD_OFFSETs for Extended Addresses in the UDC Extra Header
31-42
Freescale Semiconductor, Inc.
Width
Word External SRTS logic base address. AAL1 CES only. Should be 16-byte
aligned. The four least-significant bits are taken from SRTS_DEV in the
AAL1-specific area of the connection table entries.
idle/unassign cell template (little-endian format). Should be 64-byte
aligned. User-defined offset from dual-port RAM base. The ATM header
should be 0x0000_0000 or 0x0100_0000 (CLP=1).
Word Reserved payload. Initialize to 0x6A6A_6A6A.
Word (ABR only) The upper bound on the time between F-RM cells for an active
source. TM 4.0 defines the Trm period as 100 msec. The Trm value is
defined by the system clock and the time stamp timer prescaler; see
Section 14.3.8, "RISC Time-Stamp Control Register (RTSCR)." For time
stamp prescalar of 1µs, program Trm to be 100 ms/1µs = 100,000.
Hword (ABR only) Controls the maximum cells the source may send for each
F-RM cell. Set to 32 cells.
Hword (ABR only) Controls the bandwidth between F-RM, B-RM and user data
cell. Set to 2 cells.
Hword (ABR only) Tag cell rate. The minimum cell rate allowed for all ABR
channels. An ABR channel whose ACR is less than TCR sends only
out-of-rate F-RM cells at TCR. Should be set to 10 cells/sec as defined in
the TM 4.0. Uses the ATMF TM 4.0 floating-point format. Note that the
APC minimum cell rate (MCR) should be at least TCR.
Hword (ABR only) Points to total of 16 bytes reserved dual-port RAM area used
by the CP. Should be 16-byte aligned. User-defined offset from dual-port
RAM base.
— • For additional AAL1 CES parameters, refer to Table 32-4.
• For additional AAL2 parameters, refer to Table 33-13.
0
0x0 UEAD_OFFSET = 0x2
0x4 UEAD_OFFSET = 0x6
0x8 UEAD_OFFSET = 0xA
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Description
15 16
UEAD_OFFSET = 0x0
UEAD_OFFSET = 0x4
UEAD_OFFSET = 0x8
31
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