Motorola PowerQUICC II MPC8280 Series Reference Manual page 1026

ATM Pace Control (APC) Unit
31.3.3.2 Determining the Number of Slots in a Scheduling Table
The number of time slots in a scheduling table is determined by the channel with the
minimum bit rate; see equation B. The minimum bit rate is achieved when the channel
reschedules only once in a whole table scan. (The maximum schedule advance allowed is
equal to number_of_slots-1.) For example, if the line rate is 155.52 Mbps, the minimum bit
rate is 32 kbps and the CPS is 4, then, according to equation B, the number of slots should
be 1,216.
The following APC configuration is not recommended for
values outside the following ranges (PCR = peak cell rate,
PCRF = peak cell rate fraction, NOS = number of slots):
PCR = 1 and PCRF = 0
PCR = NOS - 1 and PCRF = 0
(B)
Min bit rate =
For the above example, 32 kbps = 155.52 Mbps/((1216-1) × 4).
Use equations (A) and (B) to obtain the maximum and minimum bit rates of a scheduling
table. For example, given a line rate = 155.52 Mbps, number_of_slots = 1025, and CPS = 8:
31.3.4 Determining the Time-Slot Scheduling Rate of a
Channel
The time-slot scheduling rate of each ATM channel is defined by equation C. The resulting
number of APC slots is written in either TCT[PCR], TCTE[SCR] or TCTE[MCR],
depending on the traffic type.
(C) Rate [slots] =
31.3.5 ATM Traffic Type
The APC uses the cell rate pacing parameters (PCR, SCR, and MCR) to generate CBR,
VBR, ABR, UBR+, and UBR traffic. The user determines the kind of traffic that is
generated per VC by writing to TCT[ATT] (ATM traffic type); see Section 31.10.2.3,
"Transmit Connection Table (TCT)."
31-12
Freescale Semiconductor, Inc.
NOTE
(number_of_slots - 1) × cells per slot
Max bit rate = (155.52 Mbps)/8 = 19.44 Mbps
Min bit rate = (155.52 Mbps)/(1024 × 8) = 18.98 kbps.
VC rate [bps] × cells per slot
MPC8280 PowerQUICC II Family Reference Manual
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line rate
line rate [bps]
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