Motorola PowerQUICC II MPC8280 Series Reference Manual page 1192

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AAL2 Receiver
ATM Rx VC
1
CID mapping table
CID71
Offset
ATM Rx VC
2
CID mapping table
CID14
Offset
A partial packet discard mode is provided for the AAL2 switched channels that perform
end-to-end SSSAR. When this mode is enabled (switch RxQD[PPD]=1), if no buffer is
available to receive a packet in the middle of a frame, the subsequent middle packets of the
SSSAR SDU are discarded. When the last packet of the SSSAR SDU arrives, the receiver
attempts to re-open a buffer.
A number-of-packets-in-queue counter is available in the TxQD. The CP increments the
counter for each packet received and decrements it for each packet sent. The host can poll
the counter periodically to verify that the switching queues are not over-loaded.
On any open BD that is partially filled, the receiver sets the UP (Un-complete packet) bit.
When the packet is fully received during a normal error-free operation, the UP mark is
removed, the Empty bit is set, and operation continues. However, if an error is detected by
the receiver, the Empty bit is set and the UP bit remains set. In such a case, the transmitter
skips this BD and proceeds to the next one. If for any reason the receiver that was in the
middle of the BD stopped receiving traffic, the UP bit remains set and the Empty bit is
cleared. Another receiver using the same BD ring monitors the UP bit in addition to the
Empty bit. If the UP bit is set, the other receiver does not proceed with the reception and
gives a Busy interrupt. See Figure 33-17.
The receiver that is in a "stuck" state marks the BD with the receiver channel code that
received the partial packet so that the host intervention is easier if needed. See
Figure 33-19.
If the TBNR Time Out CNT mechanism is used, the transmitter advances after it tries to
transmit the same BD with UP set after a given amount of attempts. The BD will be freed
up for use. Refer to the TBNR Time Out CNT description in Table 33-6.
33-24
Freescale Semiconductor, Inc.
RxQD table
Switch RxQD
Switch RxQD
Figure 33-14. AAL2 Switching
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
ATM Tx VC
TxQD
TxBD table
SW=1
TxQD
TxBD table
SW=1
Tx buffers
Tx buffers
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