Motorola PowerQUICC II MPC8280 Series Reference Manual page 1418

PowerPC Registers—Supervisor Registers
A.2 PowerPC Registers—Supervisor Registers
All supervisor-level registers implemen
state register (MSR), described in Table A-3
Table A-3. Supervisor-Level PowerPC Registers
Description
Machine state register
Table A-4 lists supervisor-level SPRs defined by the PowerPC architecture.
Table A-4. Supervisor-Level PowerPC SPRs
SPR Number
Decimal SPR[5–9] SPR[0–4]
18 00000 10010
19 00000 10011
22 00000 10110
26 00000 11010
27 00000 11011
272 01000 10000
273 01000 10001
274 01000 10010
275 01000 10011
284 01000 11100
285 01000 11101
287 01000 11111
1
Any read (mftb) to this address causes an implementation-dependent software emulation exception.
A-2
Freescale Semiconductor, Inc.
ted on the MPC8280 ar
.
Name
MSR See the Programming Environments Manual and G2
PowerPC Core Reference Manual
Name
DSISR See the Programming Environments
Manual
DAR See the Programming Environments
Manual
DEC See the Programming Environments
Manual
SRR0 See the Programming Environments
Manual
SRR1 See the Programming Environments
Manual
SPRG0 See the Programming Environments
Manual
SPRG1
SPRG2
SPRG3
1
TBL write See the Programming Environments
Manual
1
TBU write
PVR Section 2.3.1.2.4, "Processor Version
Register (PVR)."
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e SPRs, except for the machine
Comments
Comments
Serialize Access
Write fetch sync
Serialize Access
Write: Full sync
Read: Sync relative to
load/store operations
Write: Full sync
Read: Sync relative to load/
store operations
Write
Write
Write
Write
Write (as a store)
No (read-only register)
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