Motorola PowerQUICC II MPC8280 Series Reference Manual page 836

SCC Ethernet Parameter RAM
recognition. In addition, the RENA signal supplied from the SIA can be used to abort the
comparison if a collision occurs on the receive frame.
After the comparison, the CAM control logic asserts the receive reject signal (REJECT), if
the current receive frame is rejected. The MPC8280's Ethernet controller then immediately
stops writing data to system memory and reuses the buffer(s) for the next frame. If the CAM
accepts the frame, the CAM control logic does nothing (REJECT is not asserted). However,
if REJECT is asserted, it must be done prior to the end of the receive frame.
The bus atomicity mechanism for CAM accesses may not
function correctly when the CPM performs a DMA access to an
external CAM device. This only impacts systems in which
multiple CPMs will access the CAM.
25.7 SCC Ethernet Parameter RAM
For Ethernet mode, the protocol-specific area of the SCC parameter RAM is mapped as in
Table 25-1.
Table 25-1. SCC Ethernet Parameter RAM Memory Map
1
Offset Name
0x30 C_PRES
0x34 C_MASK
0x38 CRCEC
0x3C ALEC
0x40 DISFC
0x44 PADS
0x46 RET_LIM
0x48 RET_CNT
0x4A MFLR
25-8
Freescale Semiconductor, Inc.
NOTE
Width
Word Preset CRC. For the 32-bit CRC-CCITT, initialize to 0xFFFFFFFF.
Word Constant mask for CRC. For the 32-bit CRC-CCITT, initialized to 0xDEBB20E3.
Word CRC error, alignment error, and discard frame counters. The CPM maintains
these 32-bit (modulo 2
disabled. CRCEC is incremented for each received frame with a CRC error, not
including frames not addressed to the controller, frames received in the
out-of-buffers condition, frames with overrun errors, or frames with alignment
errors. ALEC is incremented for frames received with dribbling bits, but does not
include frames not addressed to the controller, frames received in the
out-of-buffers condition, or frames with overrun errors. DISFC is incremented for
frames discarded because of the out-of-buffers condition or an overrun error. The
CRC does not have to be correct for DISFC to be incremented.
Hword Short frame PAD character. Write the pad character pattern to be sent when short
frame padding is implemented into PADS. The pattern may be of any value, but
both the high and low bytes should be the same.
Hword Retry limit. Number of retries (typically 15 decimal) that can be made to send a
frame. An interrupt can be generated if the limit is reached.
Hword Retry limit counter. Temporary down-counter for counting retries.
Hword Maximum frame length register (Typically 1518 decimal). The Ethernet controller
checks the length of an incoming Ethernet frame against this limit. If it is
exceeded, the rest of the frame is discarded and LG is set in the last BD of that
frame. The controller reports frame status and length in the last BD. MFLR is
defined as all in-frame bytes between the start frame delimiter and the end of the
frame.
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Description
32
) counters that can be initialized while the channel is
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