Motorola PowerQUICC II MPC8280 Series Reference Manual page 1319

Table 36-2. Ethernet-Specific Parameter RAM (continued)
1
Offset Name Width
2
0xE4 P65C Word (RMON mode only) The total number of packets (including bad packets) received that
2
0xE8 P128C Word (RMON mode only) The total number of packets (including bad packets) received that
2
0xEC P256C Word (RMON mode only) The total number of packets (including bad packets) received that
2
0xF0 P512C Word (RMON mode only) The total number of packets (including bad packets) received that
2
0xF4 P1024C Word (RMON mode only) The total number of packets (including bad packets) received that
0xF8 CAM_BUF Word Internal buffer for CAM result
0xFC — Word Reserved, should be cleared.
1
Offset from FCC base: 0x8400 (FCC1), 0x8500 (FCC2) and 0x8600 (FCC3); see Section 14.5.2, "Parameter RAM."
2
32-bit (modulo 232) counters maintained by the CP; cleared by the user while the channel is disabled.
36.9 Programming Model
The core configures an FCC to operate as an Ethernet controller using GFMR[MODE]. The
receive errors (collision, overrun, nonoctet-aligned frame, short frame, frame too long, and
CRC error) are reported through the RxBD. The transmit errors (underrun, heartbeat, late
collision, retransmission limit, and carrier sense lost) are reported through the TxBD.
The user should program the FDSR as described in Section 30.4, "FCC Data
Synchronization Registers (FDSRx)," with FDSR[SYN2] = 0xD5 and FDSR[SYN1] =
0x55.
36.10 Ethernet Command Set
The transmit and receive commands are issued to the CPCR; see Section 14.4, "Command
Set."
Before resetting the CPM, configure TX_EN (RTS) to be an
input.
Transmit commands that apply to Ethernet are described in Table 36-3.
MOTOROLA
Freescale Semiconductor, Inc.
were between 65 and 127 octets long inclusive (excluding framing bits but including
FCS octets).
were between 128 and 255 octets long inclusive (excluding framing bits but including
FCS octets).
were between 256 and 511 octets long inclusive (excluding framing bits but including
FCS octets).
were between 512 and 1023 octets long inclusive (excluding framing bits but including
FCS octets).
were between 1024 and 1518 octets long inclusive (excluding framing bits but
including FCS octets).
NOTE
Chapter 36. Fast Ethernet Controller
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Programming Model
Description
36-13