Motorola PowerQUICC II MPC8280 Series Reference Manual page 1326

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Ethernet Error-Handling Procedure
Both internal and external loopback are configured using combinations of FPSMR[LPB]
and GFMR[DIAG]. Because of the full-duplex nature of the loopback operation, the
performance of the other FCCs is degraded.
Internal loopback disconnects the FCC from the SI. The receive data is connected to the
transmit data. The transmitted data from the transmit FIFO is received immediately into the
receive FIFO. There is no heartbeat check in this mode.
In external loopback operation, the Ethernet controller listens for data received from the
PHY while it is sending.
36.17 Ethernet Error-Handling Procedure
The Ethernet controller reports frame reception and transmission error conditions using the
channel BDs, the error counters, and the FCC event register.
Transmission errors are described in Table 36-6.
Error
Transmitter
The controller sends 32 bits that ensure a CRC error, terminates buffer transmission, closes the
underrun
buffer, sets TxBD[UN] and FCCE[TXE]. The controller resumes transmission after receiving the
RESTART TRANSMIT
Carrier sense
If no collision is detected in the frame, the controller sets TxBD[CSL] and FCCE[TXE], and it
lost during frame
continues the buffer transmission normally. No retries are performed as a result of this error.
transmission
Retransmission
The controller terminates buffer transmission, closes the buffer, sets TxBD[RL] and FCCE[TXE].
attempts limit
Transmission resumes after receiving the
expired
Late collision
The controller terminates buffer transmission, closes the buffer, sets TxBD[LC] and FCCE[TXE]. The
controller resumes transmission after receiving the
collision parameters are defined in FPSMR[LCW].
Reception errors are described in Table 36-7.
Error
Overrun error
The Ethernet controller maintains an internal FIFO buffer for receiving data. If a receiver FIFO buffer
overrun occurs, the controller writes the received data byte to the internal FIFO buffer over the
previously received byte. The previous data byte and frame status are lost. The controller closes the
buffer, sets RxBD[OV] and FCCE[RXF], and increments the discarded frame counter (DISFC). The
receiver then enters hunt mode.
Busy error
A frame is received and discarded due to a lack of buffers. The controller sets FCCE[BSY] and
increments the discarded frame counter (DISFC).
36-20
Freescale Semiconductor, Inc.
Table 36-6. Transmission Errors
command.
Table 36-7. Reception Errors
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
Response
command.
RESTART TRANSMIT
RESTART TRANSMIT
Description
command. Note that late
MOTOROLA

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