Motorola PowerQUICC II MPC8280 Series Reference Manual page 561

The value shown adjacent to each bubble represents the value of the TMS signal sampled
on the rising edge of the TCK signal. Figure 13-2 shows the state machine.
Test Logic
Reset
1
0
Run—Test/Idle
0
13.3 Boundary Scan Register
The MPC8280's scan chain implementation has a 878-bit boundary scan register that
contains bits for all device signal, clock pins, and associated control signals. The
PORESET_B and XFC pins are associated with analog signals and are not included in the
boundary scan register. An IEEE-1149.1-compliant boundary-scan register has been
included on the MPC8280 that can be connected between TDI and TDO when EXTEST or
SAMPLE/PRELOAD instructions are selected. It is used for capturing signal pin data on
MOTOROLA
Freescale Semiconductor, Inc.
1
Select—DR_SCAN
Capture—DR
Shift—DR
Exit1—DR
Pause—DR
Exit2—DR
Update—DR
1
Figure 13-2. TAP Controller State Machine
Chapter 13. IEEE 1149.1 Test Access Port
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1
Select—IR_SCAN
0
Capture—IR
0
1
0
Pause—IR
1
1
Update—IR
1
0
Boundary Scan Register
1
0
0
Shift—IR
1
Exit1—IR
0
1
Exit2—IR
1
0
13-3