Motorola PowerQUICC II MPC8280 Series Reference Manual page 659

16.4.6 CMX SMC Clock Route Register (CMXSMR)
The CMX SMC clock route register (CMXSMR), shown in Figure 16-12, defines the
connection of the SMCs to the TSA and to the clock sources from the bank of clocks.
0
Field SMC1
Reset
R/W
Addr
Figure 16-12. CMX SMC Clock Route Register (CMXSMR)
Table 16-7 describes CMXSMR fields.
Bit s Name
0 SMC1 SMC1 connection
0 SMC1 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus SMCn pins is made in the parallel I/O
control register.
1 SMC1 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes.
1 — Reserved, should be cleared
2–3 SMC1CS SMC1 clock source (NMSI mode). SMC1 can take its clocks from one of the two BRGs or one of
two pins from the bank of clocks. However, the SMC1 transmit and receive clocks must be the same
when it is connected to the NMSI.
00 SMC1 transmit and receive clocks are BRG1.
01 SMC1 transmit and receive clocks are BRG7.
10 SMC1 transmit and receive clocks are CLK7.
11 SMC1 transmit and receive clocks are CLK9.
4 SMC2 SMC2 connection
0 SMC2 is not connected to the TSA and is either connected directly to the NMSIx pins or is not
used. The choice of general-purpose I/O port pins versus SMCn pins is made in the parallel I/O
control register.
1 SMC2 is connected to the TSA of the SIs. The NMSIx pins are available for other purposes.
5 — Reserved, should be cleared
6–7 SMC2CS SMC2 clock source (NMSI mode). SMC2 can take its clocks from one of the eight BRGs or one of
eight pins from the bank of clocks. However, the SMC2 transmit and receive clocks must be the
same when it is connected to the NMSI.
00 SMC2 transmit and receive clocks are BRG2.
01 SMC2 transmit and receive clocks are BRG8.
10 SMC2 transmit and receive clocks are CLK19.
11 SMC2 transmit and receive clocks are CLK20.
MOTOROLA
Freescale Semiconductor, Inc.
1 2 3
— SMC1CS
Table 16-7. CMXSMR Field Descriptions
Chapter 16. CPM Multiplexing
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4 5
SMC2 —
0000_0000
R/W
0x11B0C
Description
CMX Registers
6 7
SMC2CS
16-19