Motorola PowerQUICC II MPC8280 Series Reference Manual page 681

0
Field —
Reset
R/W
Addr
1
On .29µm (HiP3), Rev A.1 devices, MSNUM = [0–5]. For .25µm (HiP4) and all other .29µm devices, MSNUM = [2–6].
Figure 19-4. SDMA Transfer Error MSNUM Registers (PDTEM/LDTEM)
Table 19-2 describes PDTEM and LDTEM fields.
Table 19-2. PDTEM and LDTEM Field Descriptions
1
Bits Name
2
0–1 — Reserved, should be cleared.
3
2–6 MSNUM[2–6] Bits 2–6
bus. See the SBC field description of the CPCR in Section 14.4.1, "CP Command Register
(CPCR)."
4
7 MSNUM[7] Bit 7
0 Transmit section
1 Receive section
1
Bit ranges are for .29µm (HiP3) Rev B.3, C.2 and .25µm (HiP4) devices. For .29µm Rev A.1 devices, refer to notes
2–4.
2
On .29µm Rev A.1 devices, [6–7].
3
On .29µm Rev A.1 devices, MSNUM[0–4].
4
On .29µm Rev A.1 devices, MSNUM[5].
19.3 IDMA Emulation
The CPM can be configured to provide general-purpose DMA functionality through the
SDMA channel. Four general-purpose independent DMA (IDMA) channels are supported.
In this special emulation mode, the user can specify any memory-to-memory or
peripheral-to/from-memory transfers as if using dedicated DMA hardware.
The general-purpose IDMA channels can operate in different user-programmable data
transfer modes. The IDMA can transfer data between any combination of memory and I/O.
In addition, data may be transferred in either byte, half-word, word, double-word or burst
quantities (note that IDMA cannot burst to or from the dual-port RAM) and the source and
destination addresses may be odd or even. The most efficient packing algorithms are used
in the IDMA transfers; however, anytime the IDMA has 0x10 or more bytes to transfer, it
will burst. The single-address mode (fly-by mode) gives the highest performance, allowing
data to be transferred between memory and a peripheral in a single bus transaction. The
chip-select and wait-state generation logic on the MPC8280 can be used with the IDMA.
MOTOROLA
Freescale Semiconductor, Inc.
1 2
0x10054 (PDTEM); 0x1005C (LDTEM)
3
of MSNUM is the sub-block code of the current peripheral controller accessing the
4
of MSNUM indicates which section of the peripheral controller is accessing the bus.
Chapter 19. SDMA Channels and IDMA Emulation
For More Information On This Product,
Go to: www.freescale.com
1
MSNUM
—
R
Description
IDMA Emulation
7
19-5