Motorola PowerQUICC II MPC8280 Series Reference Manual page 1304

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Implementation Example
4. Program CPM MUX
5. Program the TC block
6. Program the Serial Interface (SI)
7. Enable TDM
Step 1
To setup and initialize FCC2, program the FPSMR and GFMR as shown in Table 14. This
is for working with one TC block operating in a single PHY environment. The transmitter
and receiver should not be enabled at this time. In this example, FCC2 does not discard idle
cells.
Table 35-7. Programming GFMR and FPSMR to Setup the FCC2
Init Values
FPSMR2 = 0x0080_0000
GFMR2 = 0x0000_000A
Step 2
Because the FCC2 UTOPIA bus is connected internally to the TC UTOPIA bus, program
the parallel ports and BRGs for the active TDM(s).
Step 3
To enable receiving and transmitting, FCC2 should be programmed as shown in Table 15.
Init Values
GFMR2 = 0x0000_003A
Step 4
To define the connection of FCC2, the CPM MUX should be programmed as shown in
Table 16.
Table 35-9. Programming the CPM MUX for a TI Application
Init Values
CMXFCR = 0x0080_0000
CMXUAR = 0x0000
Step 5
The TCx layer block should be configured using the TCMODEx and CDSMR1 registers as
shown in Table 17. Note that the TC layer must be enabled after both FCC2 and CPM MUX
have been programmed.
35-18
Freescale Semiconductor, Inc.
UTOPIA Rx and Tx in Master Mode, Idle cells are not discarded
ATM Protocol Mode, Receiver and Transmitter are disabled
Table 35-8. Enable FCC2
Enable Rx and Tx
FCC2 is connected to the TC Layer
FCC2 as UTOPIA master
MPC8280 PowerQUICC II Family Reference Manual
For More Information On This Product,
Go to: www.freescale.com
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