Motorola PowerQUICC II MPC8280 Series Reference Manual page 1182

AAL2 Transmitter
0
Offset + 0x00
Offset + 0x02
Offset + 0x04
Offset + 0x06
Offset + 0x08
Offset + 0x0A
Offset + 0x0C
Offset + 0x0E
Figure 33-7. CPS Tx Queue Descriptor (TxQD)
Table 33-2 describes the CPS TxQD fields.
.
1
Offset Bits Name
0x00 0-7 —
8 BNM
9 SW
10 HEC
11 CPS
12 TBM
13-15 —
0x02 — TxBD Table
Offset In
0x04 — TxBD Table
Base
0x08 — TxBD Table
Offset Out
33-14
Freescale Semiconductor, Inc.
—
TxBD Table Offset In (switched mode only)
TxBD Table Offset Out
Number of Packets In Queue
Table 33-2. CPS TxQD Field Descriptions
Reserved for internal use. (Used to save the BD status of the open BD.)
Buffer not-ready interrupt mask of the TxBD table.
0 The transmit buffer-not-ready event for this queue is masked. (The event is not sent
to the interrupt queue.)
1 The buffer-not-ready event for this queue is enabled.
Switching queue.
0 Normal TX Queue.
1 This TxQD handles a switching queue. The receiver and transmitter share this queue.
HEC calculation.
0 Transmitter calculates the CPS header HEC.
1 The CPS header HEC is taken as is from the CPS buffer descriptor.
Sublayer type. For a CPS TxQD, this field must be set.
0 SSSAR or SSTED.
1 CPS packet.
Transmit buffer interrupt mask.
0 The transmit buffer event of this queue is masked. (The event is not sent to the
interrupt queue).
1 The transmit buffer event of this queue is enabled.
Reserved, should be cleared during initialization.
Used only when this queue is used for switching (SW=1). Should be cleared during
initialization.
This pointer points to the base address of the BD table.
Holds the offset from the TxBD table base to the next BD to be opened by the
transmitter. Should be cleared during initialization.
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7 8 9 10
BNM SW HEC CPS TBM
TxBD Table Base
NextQueue
—
Description
11 12 13
—
MOTOROLA
15