Motorola PowerQUICC II MPC8280 Series Reference Manual page 627

Figure 15-16 shows the effects of changing FE when CE = 1 with no frame sync delay.
CE=1
L1CLK
L1SYNC
L1TXD
(Bit-0)
L1ST
(On Bit-0)
L1SYNC
L1TXD
(Bit-0)
L1ST
(On Bit-0)
L1SYNC
L1TXD
(Bit-0)
L1ST
(On Bit-0)
L1SYNC
L1TXD
(Bit-0)
L1ST
(On Bit-0)
Figure 15-16. Falling Edge (FE) Effect When CE = 1 and xFSD = 00
MOTOROLA Chapter 15. Serial Interface with Time-Slot Assigner
Freescale Semiconductor, Inc.
Rx Sampled Here
Rx Sampled Here
For More Information On This Product,
Go to: www.freescale.com
The L1ST is Driven from Sync.
Data is Driven from Clock Low.
L1ST is Driven from Clock High.
Both Data Bit-0 and L1ST are
Driven from Sync.
L1ST and Data Bit-0 is Driven
from Clock Low.
Serial Interface Registers
xFSD=00
(FE=0)
(FE=0)
(FE=1)
(FE=1)
15-23