Motorola PowerQUICC II MPC8280 Series Reference Manual page 1199

Note that the CPS switch RxQD must be unique for every Rx switched CID.
0
Offset + 0x00
Offset + 0x02
Figure 33-18. CPS Switch Rx Queue Descriptor
Table 33-9 describes the CPS switch RxQD fields.
Table 33-9. CPS Switch RxQD Field Descriptions
1
Offset Bits Name
0x00 0-7 TX CID
8-11 —
12 RBM
13 PPD
14-15 SubType
0x02 — TxQD
Pointer
1
Boldfaced entries must be initialized by the user.
33.4.4.6 SWITCH Receive/Transmit Buffer Descriptor (RxBD)
The switch buffer structure consists of a BD table that points to data buffers. The RxBDs
contain, apart from the buffer pointer, the packet header, as shown in Figure 33-19. The
buffers contain the packet payload. This BD is common to the receiver and the transmitter.
0 1
Offset + 0x00 E/R 0
Offset + 0x02
Offset + 0x04
Offset + 0x06
Figure 33-19. Switch Receive/Transmit Buffer Descriptor
MOTOROLA
Freescale Semiconductor, Inc.
7
TX CID
Translation CID. The received CID is saved in a TX Queue with this new CID number.
Reserved, should be cleared during initialization.
Receive buffer mask
0 Disable receive buffer interrupt
1 Enable receive buffer interrupt
Partial packet discard
0 Normal mode
1 When a buffer-not-ready event causes a packet to be discarded, the remainder of the
SSSAR SDU is also discarded. This allows for better performance for switched
channels that implement SSSAR.
Sublayer type. Should be 01 (CPS switched) for this descriptor.
00 CPS sublayer
01 CPS switched
10 SSSAR
11 Reserved
Points to the TxQD into which the packets of this CID are stored and later sent.
2 3 4 5 6
W I —
Packet Header (Receiver CC)
Rx Data Buffer Pointer (RXDBPTR)
Chapter 33. ATM AAL2
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8 11
—
TxQD Pointer
Description
7 8
UP CPS Packet Header
AAL2 Receiver
12 13 14 15
RBM PPD SubType
15
33-31